mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-11 12:28:41 +08:00
5e0a760b44
commit 23baf831a3
("mm, treewide: redefine MAX_ORDER sanely") has
changed the definition of MAX_ORDER to be inclusive. This has caused
issues with code that was not yet upstream and depended on the previous
definition.
To draw attention to the altered meaning of the define, rename MAX_ORDER
to MAX_PAGE_ORDER.
Link: https://lkml.kernel.org/r/20231228144704.14033-2-kirill.shutemov@linux.intel.com
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
550 lines
14 KiB
Plaintext
550 lines
14 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
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comment "Processor Type"
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choice
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prompt "CPU family support"
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default M68KCLASSIC if MMU
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default COLDFIRE if !MMU
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help
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The Freescale (was Motorola) M68K family of processors implements
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the full 68000 processor instruction set.
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The Freescale ColdFire family of processors is a modern derivative
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of the 68000 processor family. They are mainly targeted at embedded
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applications, and are all System-On-Chip (SOC) devices, as opposed
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to stand alone CPUs. They implement a subset of the original 68000
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processor instruction set.
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If you anticipate running this kernel on a computer with a classic
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MC68xxx processor, select M68KCLASSIC.
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If you anticipate running this kernel on a computer with a ColdFire
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processor, select COLDFIRE.
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config M68KCLASSIC
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bool "Classic M68K CPU family support"
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select HAVE_ARCH_PFN_VALID
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config COLDFIRE
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bool "Coldfire CPU family support"
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select CPU_HAS_NO_BITFIELDS
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select CPU_HAS_NO_CAS
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select CPU_HAS_NO_MULDIV64
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select GENERIC_CSUM
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select GPIOLIB
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select HAVE_LEGACY_CLK
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endchoice
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if M68KCLASSIC
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config M68000
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def_bool y
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depends on !MMU
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select CPU_HAS_NO_BITFIELDS
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select CPU_HAS_NO_CAS
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select CPU_HAS_NO_MULDIV64
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select CPU_HAS_NO_UNALIGNED
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select GENERIC_CSUM
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select CPU_NO_EFFICIENT_FFS
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select HAVE_ARCH_HASH
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select LEGACY_TIMER_TICK
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help
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The Freescale (was Motorola) 68000 CPU is the first generation of
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the well known M68K family of processors. The CPU core as well as
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being available as a stand alone CPU was also used in many
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System-On-Chip devices (eg 68328, 68302, etc). It does not contain
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a paging MMU.
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config M68020
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bool "68020 support"
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depends on MMU
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select FPU
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select CPU_HAS_ADDRESS_SPACES
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help
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If you anticipate running this kernel on a computer with a MC68020
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processor, say Y. Otherwise, say N. Note that the 68020 requires a
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68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
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Sun 3, which provides its own version.
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config M68030
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bool "68030 support"
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depends on MMU && !MMU_SUN3
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select FPU
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select CPU_HAS_ADDRESS_SPACES
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help
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If you anticipate running this kernel on a computer with a MC68030
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processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
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work, as it does not include an MMU (Memory Management Unit).
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config M68040
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bool "68040 support"
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depends on MMU && !MMU_SUN3
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select FPU
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select CPU_HAS_ADDRESS_SPACES
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help
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If you anticipate running this kernel on a computer with a MC68LC040
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or MC68040 processor, say Y. Otherwise, say N. Note that an
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MC68EC040 will not work, as it does not include an MMU (Memory
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Management Unit).
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config M68060
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bool "68060 support"
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depends on MMU && !MMU_SUN3
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select FPU
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select CPU_HAS_ADDRESS_SPACES
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help
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If you anticipate running this kernel on a computer with a MC68060
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processor, say Y. Otherwise, say N.
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config M68328
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bool
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depends on !MMU
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select M68000
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help
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Motorola 68328 processor support.
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config M68EZ328
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bool
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depends on !MMU
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select M68000
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help
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Motorola 68EX328 processor support.
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config M68VZ328
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bool
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depends on !MMU
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select M68000
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help
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Motorola 68VZ328 processor support.
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endif # M68KCLASSIC
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if COLDFIRE
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choice
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prompt "ColdFire SoC type"
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default M520x
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help
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Select the type of ColdFire System-on-Chip (SoC) that you want
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to build for.
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config M5206
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bool "MCF5206"
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depends on !MMU
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select COLDFIRE_SW_A7
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select COLDFIRE_TIMERS
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select HAVE_MBAR
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select CPU_NO_EFFICIENT_FFS
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help
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Motorola ColdFire 5206 processor support.
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config M5206e
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bool "MCF5206e"
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depends on !MMU
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select COLDFIRE_SW_A7
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select COLDFIRE_TIMERS
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select HAVE_MBAR
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select CPU_NO_EFFICIENT_FFS
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help
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Motorola ColdFire 5206e processor support.
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config M520x
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bool "MCF520x"
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depends on !MMU
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select COLDFIRE_PIT_TIMER
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select HAVE_CACHE_SPLIT
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help
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Freescale Coldfire 5207/5208 processor support.
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config M523x
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bool "MCF523x"
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depends on !MMU
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select COLDFIRE_PIT_TIMER
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select HAVE_CACHE_SPLIT
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select HAVE_IPSBAR
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help
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Freescale Coldfire 5230/1/2/4/5 processor support
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config M5249
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bool "MCF5249"
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depends on !MMU
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select COLDFIRE_SW_A7
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select COLDFIRE_TIMERS
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select HAVE_MBAR
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select CPU_NO_EFFICIENT_FFS
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help
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Motorola ColdFire 5249 processor support.
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config M525x
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bool "MCF525x"
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depends on !MMU
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select COLDFIRE_SW_A7
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select COLDFIRE_TIMERS
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select HAVE_MBAR
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select CPU_NO_EFFICIENT_FFS
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help
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Freescale (Motorola) Coldfire 5251/5253 processor support.
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config M5271
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bool "MCF5271"
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depends on !MMU
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select COLDFIRE_PIT_TIMER
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select M527x
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select HAVE_CACHE_SPLIT
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select HAVE_IPSBAR
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help
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Freescale (Motorola) ColdFire 5270/5271 processor support.
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config M5272
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bool "MCF5272"
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depends on !MMU
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select COLDFIRE_SW_A7
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select COLDFIRE_TIMERS
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select HAVE_MBAR
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select CPU_NO_EFFICIENT_FFS
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help
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Motorola ColdFire 5272 processor support.
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config M5275
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bool "MCF5275"
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depends on !MMU
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select COLDFIRE_PIT_TIMER
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select M527x
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select HAVE_CACHE_SPLIT
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select HAVE_IPSBAR
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help
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Freescale (Motorola) ColdFire 5274/5275 processor support.
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config M528x
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bool "MCF528x"
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depends on !MMU
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select COLDFIRE_PIT_TIMER
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select HAVE_CACHE_SPLIT
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select HAVE_IPSBAR
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help
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Motorola ColdFire 5280/5282 processor support.
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config M5307
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bool "MCF5307"
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depends on !MMU
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select COLDFIRE_TIMERS
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select COLDFIRE_SW_A7
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select HAVE_CACHE_CB
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select HAVE_MBAR
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select CPU_NO_EFFICIENT_FFS
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help
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Motorola ColdFire 5307 processor support.
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config M532x
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bool "MCF532x"
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depends on !MMU
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select COLDFIRE_TIMERS
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select M53xx
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select HAVE_CACHE_CB
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help
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Freescale (Motorola) ColdFire 532x processor support.
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config M537x
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bool "MCF537x"
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depends on !MMU
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select COLDFIRE_TIMERS
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select M53xx
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select HAVE_CACHE_CB
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help
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Freescale ColdFire 537x processor support.
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config M5407
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bool "MCF5407"
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depends on !MMU
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select COLDFIRE_SW_A7
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select COLDFIRE_TIMERS
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select HAVE_CACHE_CB
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select HAVE_MBAR
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select CPU_NO_EFFICIENT_FFS
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help
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Motorola ColdFire 5407 processor support.
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config M547x
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bool "MCF547x"
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select M54xx
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select COLDFIRE_SLTIMERS
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select MMU_COLDFIRE if MMU
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select FPU if MMU
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select HAVE_CACHE_CB
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select HAVE_MBAR
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select CPU_NO_EFFICIENT_FFS
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help
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Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
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config M548x
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bool "MCF548x"
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select COLDFIRE_SLTIMERS
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select MMU_COLDFIRE if MMU
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select FPU if MMU
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select M54xx
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select HAVE_CACHE_CB
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select HAVE_MBAR
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select CPU_NO_EFFICIENT_FFS
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help
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Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
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config M5441x
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bool "MCF5441x"
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select COLDFIRE_PIT_TIMER
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select MMU_COLDFIRE if MMU
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select HAVE_CACHE_CB
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help
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Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
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endchoice
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config M527x
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bool
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config M53xx
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bool
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config M54xx
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select HAVE_PCI
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bool
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config COLDFIRE_PIT_TIMER
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bool
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config COLDFIRE_TIMERS
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bool
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select LEGACY_TIMER_TICK
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config COLDFIRE_SLTIMERS
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bool
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select LEGACY_TIMER_TICK
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endif # COLDFIRE
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comment "Processor Specific Options"
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config M68KFPU_EMU
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bool "Math emulation support"
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depends on M68KCLASSIC && FPU
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help
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At some point in the future, this will cause floating-point math
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instructions to be emulated by the kernel on machines that lack a
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floating-point math coprocessor. Thrill-seekers and chronically
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sleep-deprived psychotic hacker types can say Y now, everyone else
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should probably wait a while.
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config M68KFPU_EMU_EXTRAPREC
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bool "Math emulation extra precision"
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depends on M68KFPU_EMU
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help
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The fpu uses normally a few bit more during calculations for
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correct rounding, the emulator can (often) do the same but this
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extra calculation can cost quite some time, so you can disable
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it here. The emulator will then "only" calculate with a 64 bit
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mantissa and round slightly incorrect, what is more than enough
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for normal usage.
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config M68KFPU_EMU_ONLY
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bool "Math emulation only kernel"
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depends on M68KFPU_EMU
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help
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This option prevents any floating-point instructions from being
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compiled into the kernel, thereby the kernel doesn't save any
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floating point context anymore during task switches, so this
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kernel will only be usable on machines without a floating-point
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math coprocessor. This makes the kernel a bit faster as no tests
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needs to be executed whether a floating-point instruction in the
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kernel should be executed or not.
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config ADVANCED
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bool "Advanced configuration options"
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depends on MMU
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help
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This gives you access to some advanced options for the CPU. The
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defaults should be fine for most users, but these options may make
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it possible for you to improve performance somewhat if you know what
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you are doing.
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Note that the answer to this question won't directly affect the
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kernel: saying N will just cause the configurator to skip all
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the questions about these options.
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Most users should say N to this question.
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config RMW_INSNS
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bool "Use read-modify-write instructions"
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depends on ADVANCED && !CPU_HAS_NO_CAS
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help
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This allows to use certain instructions that work with indivisible
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read-modify-write bus cycles. While this is faster than the
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workaround of disabling interrupts, it can conflict with DMA
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( = direct memory access) on many Amiga systems, and it is also said
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to destabilize other machines. It is very likely that this will
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cause serious problems on any Amiga or Atari Medusa if set. The only
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configuration where it should work are 68030-based Ataris, where it
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apparently improves performance. But you've been warned! Unless you
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really know what you are doing, say N. Try Y only if you're quite
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adventurous.
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config SINGLE_MEMORY_CHUNK
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bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
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depends on MMU
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default y if SUN3 || MMU_COLDFIRE
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help
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Ignore all but the first contiguous chunk of physical memory for VM
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purposes. This will save a few bytes kernel size and may speed up
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some operations.
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When this option os set to N, you may want to lower "Maximum zone
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order" to save memory that could be wasted for unused memory map.
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Say N if not sure.
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config ARCH_FORCE_MAX_ORDER
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int "Order of maximal physically contiguous allocations" if ADVANCED
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depends on !SINGLE_MEMORY_CHUNK
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default "10"
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help
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The kernel page allocator limits the size of maximal physically
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contiguous allocations. The limit is called MAX_PAGE_ORDER and it
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defines the maximal power of two of number of pages that can be
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allocated as a single contiguous block. This option allows
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overriding the default setting when ability to allocate very
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large blocks of physically contiguous memory is required.
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For systems that have holes in their physical address space this
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value also defines the minimal size of the hole that allows
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freeing unused memory map.
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Don't change if unsure.
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config 060_WRITETHROUGH
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bool "Use write-through caching for 68060 supervisor accesses"
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depends on ADVANCED && M68060
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help
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The 68060 generally uses copyback caching of recently accessed data.
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Copyback caching means that memory writes will be held in an on-chip
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cache and only written back to memory some time later. Saying Y
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here will force supervisor (kernel) accesses to use writethrough
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caching. Writethrough caching means that data is written to memory
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straight away, so that cache and memory data always agree.
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Writethrough caching is less efficient, but is needed for some
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drivers on 68060 based systems where the 68060 bus snooping signal
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is hardwired on. The 53c710 SCSI driver is known to suffer from
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this problem.
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config M68K_L2_CACHE
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bool
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depends on MAC
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default y
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config CPU_HAS_NO_BITFIELDS
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bool
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config CPU_HAS_NO_CAS
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bool
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config CPU_HAS_NO_MULDIV64
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bool
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config CPU_HAS_NO_UNALIGNED
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bool
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config CPU_HAS_ADDRESS_SPACES
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bool
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select ALTERNATE_USER_ADDRESS_SPACE
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config FPU
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bool
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config COLDFIRE_SW_A7
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bool
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config HAVE_CACHE_SPLIT
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bool
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config HAVE_CACHE_CB
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bool
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config HAVE_MBAR
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bool
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config HAVE_IPSBAR
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bool
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config CLOCK_FREQ
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int "Set the core clock frequency"
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default "25000000" if M5206
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default "54000000" if M5206e
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default "166666666" if M520x
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default "140000000" if M5249
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default "150000000" if M527x || M523x
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default "90000000" if M5307
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default "50000000" if M5407
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default "266000000" if M54xx
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default "66666666"
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depends on COLDFIRE
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help
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Define the CPU clock frequency in use. This is the core clock
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frequency, it may or may not be the same as the external clock
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crystal fitted to your board. Some processors have an internal
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PLL and can have their frequency programmed at run time, others
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use internal dividers. In general the kernel won't setup a PLL
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if it is fitted (there are some exceptions). This value will be
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specific to the exact CPU that you are using.
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config OLDMASK
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bool "Old mask 5307 (1H55J) silicon"
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depends on M5307
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help
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Build support for the older revision ColdFire 5307 silicon.
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Specifically this is the 1H55J mask revision.
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if HAVE_CACHE_SPLIT
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choice
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prompt "Split Cache Configuration"
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default CACHE_I
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config CACHE_I
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bool "Instruction"
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help
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Use all of the ColdFire CPU cache memory as an instruction cache.
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config CACHE_D
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bool "Data"
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help
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Use all of the ColdFire CPU cache memory as a data cache.
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config CACHE_BOTH
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bool "Both"
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help
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Split the ColdFire CPU cache, and use half as an instruction cache
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and half as a data cache.
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endchoice
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endif # HAVE_CACHE_SPLIT
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if HAVE_CACHE_CB
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choice
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prompt "Data cache mode"
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default CACHE_WRITETHRU
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config CACHE_WRITETHRU
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bool "Write-through"
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help
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The ColdFire CPU cache is set into Write-through mode.
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config CACHE_COPYBACK
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bool "Copy-back"
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help
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The ColdFire CPU cache is set into Copy-back mode.
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endchoice
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endif # HAVE_CACHE_CB
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# Coldfire cores that do not have a data cache configured can do coherent DMA.
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config COLDFIRE_COHERENT_DMA
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bool
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default y
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depends on COLDFIRE
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depends on !HAVE_CACHE_CB && !CACHE_D && !CACHE_BOTH
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config M68K_NONCOHERENT_DMA
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bool
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default y
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depends on HAS_DMA && !COLDFIRE_COHERENT_DMA
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