Arnd Bergmann b1e052903c Memory controller drivers - fixes for v6.5 ... Two fixes are needed for Tegra194 memory controllers caused by the same Tegra PCI commit merged in v6.5-rc1. The Tegra PCI requires now interconnect from the memory controller, which was set only for Tegra234, but not for Tegra194, causing probe deferrals. Expose some dummy interconnect provider for Tegra194, to satisfy PCI driver needs. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmTA3VAQHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD1zj9D/4peXLyTUWFArNLAaq3PbOHQRuPbC1MMdWN VRCqjDVGNXEYPnbh1b2kMhi2iwoBk9HeAt6HFYHgABdNZBK5VBUMDuJnT1ocNExD 8OBV3qAM+ia3TqOlhE5PVGiMudhd1R020/tIrzHB+YaiT2JpqKXo8nlXVfhwti1c yyZmIAmi9uQkC3Zn7R+5I0A5atNLa7BXAmpy8A/l7K8ojwnAxiJLXAI/+YHs0moW GPB9Nk4oYzEJDyQESKNK0ddvggwaZNCbK+wIBcEBFXXvybVr72pMYSeIG+UNpTf+ uwc5nxgHwhqNTxO4WtGYpVuAA8uPelJ4YIbcEdoJoNn5/dfzdiBYhetWPquOBMxN p1BIVx/pFujzAAjY2VvPAEbSxctMUKmLmRRAbJC3II633JxjwKahVMTOCslvtuSr /jbChJ4Ih2RL15qMmj2O/mP2qjivG/HoywtG3Rp4w5E6CfWXs3b6ytEKdifW9IEk GjctklZm1E8Jz+nVhmPfm1A+pLxG80RMEgV9kp5bEjdeNjE/SQByTlhCxP/1SSHA yT4RO3GFdBFKjpfl2xK1f74ml/ZA9KOu8WO+laD0gZVfMzX68wQWc2jIpJYtPhtO p8n8zzC2fEbzvY1Adth7XR79P1e/3yp2NZv1vTRIP6T4y+d8e2v2mqNxZxH/SFRj PS2KDX7VMw== =1ARR -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmTCc+YACgkQYKtH/8kJ UifQjQ//bIgDWLc6LsU0wnF8CEScqAxvTmXMXq0tp8o55uvUjdCjdNHRkrxQuPff /vfXJAhzvLlsovR/DghTeex8V1O1285TDt20J0UXXA7PdGTzvpjjW/+qH8OmmRDV IvP8WUWHHbgazJZaayYMLn5uAf1Ofz8ZzTkbrdYKQ9eORhwdMWC6bDNJHZF2cxEa X82FGvYL270x4IhIQpt5yg5aDFKCX6n/SEYb8H3kX61qb1TIQ1Yo3Fsr0Wr7L/1Y 6esl0zmMo7k0Jv9+9wA3u6AhYoYq6F9EvaQk9MdizG2h44o7MiO7SrSoEHuFbMbp NAyah59WSSiFV3GL9oKchgKFVqXwqiF0YZJyNTetbg70AK3Q9Yu0CDVuQFKvLtkN jh3t3XxBkX8YizDQQCCkxULEaqR2UpamoHXnnt84L4g92hYRLv0wXGWLQrAxKzIP jU+foYfkAfglfpdGI9pvz0gqdsvTfmFKKoLdlkCwgckWkydq9ZuVkAmuYFN17v2o /ihwqgZHFBZeXbLGmplb0uAHOJ7NymyNjVOSK+1C7m1WOcX4k43/MGk8KVYTuWXF V7PwiG2miUbUwkqRTUTsu+S4G7rF5MM8NoT8jLWHvlVqdig8Z5hbyvV2jPaLgEbT Z0lpoRNhBa5UP1Wgu0LNkuHPPCA7J0VVqnTCf1Wj7HrS7/rn57M= =NC+w -----END PGP SIGNATURE----- Merge tag 'memory-controller-drv-fixes-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/fixes Memory controller drivers - fixes for v6.5 Two fixes are needed for Tegra194 memory controllers caused by the same Tegra PCI commit merged in v6.5-rc1. The Tegra PCI requires now interconnect from the memory controller, which was set only for Tegra234, but not for Tegra194, causing probe deferrals. Expose some dummy interconnect provider for Tegra194, to satisfy PCI driver needs. * tag 'memory-controller-drv-fixes-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: tegra: make icc_set_bw return zero if BWMGR not supported memory: tegra: Add dummy implementation on Tegra194 Link: https://lore.kernel.org/r/20230726084811.124038-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>		2023-07-27 15:40:54 +02:00
..
amlogic	perf/amlogic: Add support for Amlogic meson G12 SoC DDR PMU driver	2022-11-21 18:28:45 +00:00
arc	clocksource/drivers/arc_timer: Eliminate redefined macro error	2021-10-16 22:15:01 +02:00
at91	ARM: at91: pm: avoid soft resetting AC DLL	2022-11-01 12:25:19 +02:00
bcm2835	firmware: raspberrypi: Fix type assignment	2023-01-10 13:44:04 -08:00
canaan	clk: Add RISC-V Canaan Kendryte K210 clock driver	2021-02-22 17:51:04 -08:00
fsl	soc: fsl: cpm1: Add support for QMC	2023-03-05 23:37:03 +00:00
imx	clocksource/drivers/imx-gpt: Fold <soc/imx/timer.h> into its only user	2023-06-23 09:33:43 +02:00
mediatek	memory: mtk-smi: Add enable IOMMU SMC command for MM master	2022-08-30 20:54:05 +03:00
microchip	clk: microchip: mpfs: add reset controller	2022-09-14 10:55:17 +03:00
mscc	net: dsa: felix: make vsc9959_tas_guard_bands_update() visible to ocelot->ops	2023-07-06 19:10:22 -07:00
qcom	soc: qcom: Make the Qualcomm UFS/SDCC ICE a dedicated driver	2023-04-07 12:08:39 -07:00
rockchip	soc: rockchip: power-domain: Manage resource conflicts with firmware	2022-05-09 03:36:52 +09:00
sa1100	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
sifive	soc: sifive: ccache: Rename SiFive L2 cache to Composable cache.	2022-10-13 11:06:51 -07:00
starfive	clk: starfive: Avoid casting iomem pointers	2023-04-13 15:45:46 -07:00
tegra	memory: tegra: Add dummy implementation on Tegra194	2023-07-10 12:04:56 +02:00