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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
149 lines
3.4 KiB
C
149 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* arch/arm/mach-iop33x/iq80331.c
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*
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* Board support code for the Intel IQ80331 platform.
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*
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* Author: Dave Jiang <dave.jiang@intel.com>
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* Copyright (C) 2003 Intel Corp.
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*/
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#include <linux/mm.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/string.h>
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#include <linux/serial_core.h>
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#include <linux/serial_8250.h>
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#include <linux/mtd/physmap.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <asm/irq.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/pci.h>
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#include <asm/mach/time.h>
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#include <asm/mach-types.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <mach/time.h>
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/*
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* IQ80331 timer tick configuration.
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*/
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static void __init iq80331_timer_init(void)
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{
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/* D-Step parts run at a higher internal bus frequency */
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if (*IOP3XX_ATURID >= 0xa)
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iop_init_time(333000000);
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else
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iop_init_time(266000000);
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}
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/*
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* IQ80331 PCI.
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*/
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static int __init
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iq80331_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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int irq;
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if (slot == 1 && pin == 1) {
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/* PCI-X Slot INTA */
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irq = IRQ_IOP33X_XINT1;
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} else if (slot == 1 && pin == 2) {
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/* PCI-X Slot INTB */
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irq = IRQ_IOP33X_XINT2;
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} else if (slot == 1 && pin == 3) {
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/* PCI-X Slot INTC */
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irq = IRQ_IOP33X_XINT3;
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} else if (slot == 1 && pin == 4) {
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/* PCI-X Slot INTD */
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irq = IRQ_IOP33X_XINT0;
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} else if (slot == 2) {
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/* GigE */
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irq = IRQ_IOP33X_XINT2;
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} else {
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printk(KERN_ERR "iq80331_pci_map_irq() called for unknown "
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"device PCI:%d:%d:%d\n", dev->bus->number,
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PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
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irq = -1;
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}
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return irq;
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}
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static struct hw_pci iq80331_pci __initdata = {
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.nr_controllers = 1,
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.ops = &iop3xx_ops,
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.setup = iop3xx_pci_setup,
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.preinit = iop3xx_pci_preinit_cond,
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.map_irq = iq80331_pci_map_irq,
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};
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static int __init iq80331_pci_init(void)
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{
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if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) &&
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machine_is_iq80331())
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pci_common_init(&iq80331_pci);
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return 0;
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}
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subsys_initcall(iq80331_pci_init);
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/*
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* IQ80331 machine initialisation.
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*/
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static struct physmap_flash_data iq80331_flash_data = {
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.width = 1,
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};
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static struct resource iq80331_flash_resource = {
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.start = 0xc0000000,
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.end = 0xc07fffff,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device iq80331_flash_device = {
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.name = "physmap-flash",
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.id = 0,
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.dev = {
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.platform_data = &iq80331_flash_data,
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},
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.num_resources = 1,
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.resource = &iq80331_flash_resource,
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};
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static struct resource iq80331_gpio_res[] = {
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DEFINE_RES_MEM((IOP3XX_PERIPHERAL_PHYS_BASE + 0x1780), 0x10),
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};
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static void __init iq80331_init_machine(void)
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{
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platform_device_register_simple("gpio-iop", 0,
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iq80331_gpio_res,
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ARRAY_SIZE(iq80331_gpio_res));
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platform_device_register(&iop3xx_i2c0_device);
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platform_device_register(&iop3xx_i2c1_device);
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platform_device_register(&iop33x_uart0_device);
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platform_device_register(&iop33x_uart1_device);
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platform_device_register(&iq80331_flash_device);
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platform_device_register(&iop3xx_dma_0_channel);
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platform_device_register(&iop3xx_dma_1_channel);
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platform_device_register(&iop3xx_aau_channel);
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}
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MACHINE_START(IQ80331, "Intel IQ80331")
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/* Maintainer: Intel Corp. */
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.atag_offset = 0x100,
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.map_io = iop3xx_map_io,
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.init_irq = iop33x_init_irq,
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.init_time = iq80331_timer_init,
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.init_machine = iq80331_init_machine,
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.restart = iop3xx_restart,
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MACHINE_END
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