mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-20 10:44:23 +08:00
782d59c5df
Pull irq updates from Thomas Gleixner:
"The irq departement delivers:
- a cleanup series to get rid of mindlessly copied code.
- another bunch of new pointlessly different interrupt chip drivers.
Adding homebrewn irq chips (and timers) to SoCs must provide a
value add which is beyond the imagination of mere mortals.
- the usual SoC irq controller updates, IOW my second cat herding
project"
* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (44 commits)
irqchip: gic-v3: Implement CPU PM notifier
irqchip: gic-v3: Refactor gic_enable_redist to support both enabling and disabling
irqchip: renesas-intc-irqpin: Add minimal runtime PM support
irqchip: renesas-intc-irqpin: Add helper variable dev = &pdev->dev
irqchip: atmel-aic5: Add sama5d4 support
irqchip: atmel-aic5: The sama5d3 has 48 IRQs
Documentation: bcm7120-l2: Add Broadcom BCM7120-style L2 binding
irqchip: bcm7120-l2: Add Broadcom BCM7120-style Level 2 interrupt controller
irqchip: renesas-irqc: Add binding docs for new R-Car Gen2 SoCs
irqchip: renesas-irqc: Add DT binding documentation
irqchip: renesas-intc-irqpin: Document SoC-specific bindings
openrisc: Get rid of handle_IRQ
arm64: Get rid of handle_IRQ
ARM: omap2: irq: Convert to handle_domain_irq
ARM: imx: tzic: Convert to handle_domain_irq
ARM: imx: avic: Convert to handle_domain_irq
irqchip: or1k-pic: Convert to handle_domain_irq
irqchip: atmel-aic5: Convert to handle_domain_irq
irqchip: atmel-aic: Convert to handle_domain_irq
irqchip: gic-v3: Convert to handle_domain_irq
...
41 lines
1.8 KiB
Makefile
41 lines
1.8 KiB
Makefile
obj-$(CONFIG_IRQCHIP) += irqchip.o
|
|
|
|
obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
|
|
obj-$(CONFIG_ARCH_EXYNOS) += exynos-combiner.o
|
|
obj-$(CONFIG_ARCH_HIP04) += irq-hip04.o
|
|
obj-$(CONFIG_ARCH_MMP) += irq-mmp.o
|
|
obj-$(CONFIG_ARCH_MVEBU) += irq-armada-370-xp.o
|
|
obj-$(CONFIG_ARCH_MXS) += irq-mxs.o
|
|
obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o
|
|
obj-$(CONFIG_DW_APB_ICTL) += irq-dw-apb-ictl.o
|
|
obj-$(CONFIG_METAG) += irq-metag-ext.o
|
|
obj-$(CONFIG_METAG_PERFCOUNTER_IRQS) += irq-metag.o
|
|
obj-$(CONFIG_ARCH_MOXART) += irq-moxart.o
|
|
obj-$(CONFIG_CLPS711X_IRQCHIP) += irq-clps711x.o
|
|
obj-$(CONFIG_OR1K_PIC) += irq-or1k-pic.o
|
|
obj-$(CONFIG_ORION_IRQCHIP) += irq-orion.o
|
|
obj-$(CONFIG_OMAP_IRQCHIP) += irq-omap-intc.o
|
|
obj-$(CONFIG_ARCH_SUNXI) += irq-sun4i.o
|
|
obj-$(CONFIG_ARCH_SUNXI) += irq-sunxi-nmi.o
|
|
obj-$(CONFIG_ARCH_SPEAR3XX) += spear-shirq.o
|
|
obj-$(CONFIG_ARM_GIC) += irq-gic.o irq-gic-common.o
|
|
obj-$(CONFIG_ARM_GIC_V3) += irq-gic-v3.o irq-gic-common.o
|
|
obj-$(CONFIG_ARM_NVIC) += irq-nvic.o
|
|
obj-$(CONFIG_ARM_VIC) += irq-vic.o
|
|
obj-$(CONFIG_ATMEL_AIC_IRQ) += irq-atmel-aic-common.o irq-atmel-aic.o
|
|
obj-$(CONFIG_ATMEL_AIC5_IRQ) += irq-atmel-aic-common.o irq-atmel-aic5.o
|
|
obj-$(CONFIG_IMGPDC_IRQ) += irq-imgpdc.o
|
|
obj-$(CONFIG_SIRF_IRQ) += irq-sirfsoc.o
|
|
obj-$(CONFIG_RENESAS_INTC_IRQPIN) += irq-renesas-intc-irqpin.o
|
|
obj-$(CONFIG_RENESAS_IRQC) += irq-renesas-irqc.o
|
|
obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o
|
|
obj-$(CONFIG_ARCH_NSPIRE) += irq-zevio.o
|
|
obj-$(CONFIG_ARCH_VT8500) += irq-vt8500.o
|
|
obj-$(CONFIG_TB10X_IRQC) += irq-tb10x.o
|
|
obj-$(CONFIG_XTENSA) += irq-xtensa-pic.o
|
|
obj-$(CONFIG_XTENSA_MX) += irq-xtensa-mx.o
|
|
obj-$(CONFIG_IRQ_CROSSBAR) += irq-crossbar.o
|
|
obj-$(CONFIG_BRCMSTB_L2_IRQ) += irq-brcmstb-l2.o \
|
|
irq-bcm7120-l2.o
|
|
obj-$(CONFIG_KEYSTONE_IRQ) += irq-keystone.o
|