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9e8f208ad5
Add support for OTP controller available on LAN9662. The OTPC controls the access to a non-volatile memory. The size of the memory is 8KB. The OTPC can access the memory based on an offset. Implement both the read and the write functionality. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20220916122100.170016-13-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
223 lines
5.4 KiB
C
223 lines
5.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/iopoll.h>
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#include <linux/module.h>
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#include <linux/nvmem-provider.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#define OTP_OTP_PWR_DN(t) (t + 0x00)
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#define OTP_OTP_PWR_DN_OTP_PWRDN_N BIT(0)
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#define OTP_OTP_ADDR_HI(t) (t + 0x04)
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#define OTP_OTP_ADDR_LO(t) (t + 0x08)
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#define OTP_OTP_PRGM_DATA(t) (t + 0x10)
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#define OTP_OTP_PRGM_MODE(t) (t + 0x14)
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#define OTP_OTP_PRGM_MODE_OTP_PGM_MODE_BYTE BIT(0)
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#define OTP_OTP_RD_DATA(t) (t + 0x18)
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#define OTP_OTP_FUNC_CMD(t) (t + 0x20)
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#define OTP_OTP_FUNC_CMD_OTP_PROGRAM BIT(1)
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#define OTP_OTP_FUNC_CMD_OTP_READ BIT(0)
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#define OTP_OTP_CMD_GO(t) (t + 0x28)
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#define OTP_OTP_CMD_GO_OTP_GO BIT(0)
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#define OTP_OTP_PASS_FAIL(t) (t + 0x2c)
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#define OTP_OTP_PASS_FAIL_OTP_READ_PROHIBITED BIT(3)
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#define OTP_OTP_PASS_FAIL_OTP_WRITE_PROHIBITED BIT(2)
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#define OTP_OTP_PASS_FAIL_OTP_FAIL BIT(0)
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#define OTP_OTP_STATUS(t) (t + 0x30)
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#define OTP_OTP_STATUS_OTP_CPUMPEN BIT(1)
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#define OTP_OTP_STATUS_OTP_BUSY BIT(0)
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#define OTP_MEM_SIZE 8192
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#define OTP_SLEEP_US 10
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#define OTP_TIMEOUT_US 500000
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struct lan9662_otp {
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struct device *dev;
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void __iomem *base;
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};
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static bool lan9662_otp_wait_flag_clear(void __iomem *reg, u32 flag)
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{
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u32 val;
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return readl_poll_timeout(reg, val, !(val & flag),
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OTP_SLEEP_US, OTP_TIMEOUT_US);
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}
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static int lan9662_otp_power(struct lan9662_otp *otp, bool up)
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{
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void __iomem *pwrdn = OTP_OTP_PWR_DN(otp->base);
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if (up) {
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writel(readl(pwrdn) & ~OTP_OTP_PWR_DN_OTP_PWRDN_N, pwrdn);
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if (lan9662_otp_wait_flag_clear(OTP_OTP_STATUS(otp->base),
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OTP_OTP_STATUS_OTP_CPUMPEN))
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return -ETIMEDOUT;
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} else {
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writel(readl(pwrdn) | OTP_OTP_PWR_DN_OTP_PWRDN_N, pwrdn);
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}
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return 0;
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}
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static int lan9662_otp_execute(struct lan9662_otp *otp)
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{
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if (lan9662_otp_wait_flag_clear(OTP_OTP_CMD_GO(otp->base),
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OTP_OTP_CMD_GO_OTP_GO))
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return -ETIMEDOUT;
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if (lan9662_otp_wait_flag_clear(OTP_OTP_STATUS(otp->base),
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OTP_OTP_STATUS_OTP_BUSY))
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return -ETIMEDOUT;
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return 0;
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}
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static void lan9662_otp_set_address(struct lan9662_otp *otp, u32 offset)
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{
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writel(0xff & (offset >> 8), OTP_OTP_ADDR_HI(otp->base));
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writel(0xff & offset, OTP_OTP_ADDR_LO(otp->base));
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}
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static int lan9662_otp_read_byte(struct lan9662_otp *otp, u32 offset, u8 *dst)
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{
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u32 pass;
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int rc;
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lan9662_otp_set_address(otp, offset);
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writel(OTP_OTP_FUNC_CMD_OTP_READ, OTP_OTP_FUNC_CMD(otp->base));
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writel(OTP_OTP_CMD_GO_OTP_GO, OTP_OTP_CMD_GO(otp->base));
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rc = lan9662_otp_execute(otp);
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if (!rc) {
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pass = readl(OTP_OTP_PASS_FAIL(otp->base));
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if (pass & OTP_OTP_PASS_FAIL_OTP_READ_PROHIBITED)
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return -EACCES;
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*dst = (u8) readl(OTP_OTP_RD_DATA(otp->base));
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}
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return rc;
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}
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static int lan9662_otp_write_byte(struct lan9662_otp *otp, u32 offset, u8 data)
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{
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u32 pass;
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int rc;
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lan9662_otp_set_address(otp, offset);
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writel(OTP_OTP_PRGM_MODE_OTP_PGM_MODE_BYTE, OTP_OTP_PRGM_MODE(otp->base));
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writel(data, OTP_OTP_PRGM_DATA(otp->base));
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writel(OTP_OTP_FUNC_CMD_OTP_PROGRAM, OTP_OTP_FUNC_CMD(otp->base));
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writel(OTP_OTP_CMD_GO_OTP_GO, OTP_OTP_CMD_GO(otp->base));
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rc = lan9662_otp_execute(otp);
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if (!rc) {
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pass = readl(OTP_OTP_PASS_FAIL(otp->base));
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if (pass & OTP_OTP_PASS_FAIL_OTP_WRITE_PROHIBITED)
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return -EACCES;
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if (pass & OTP_OTP_PASS_FAIL_OTP_FAIL)
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return -EIO;
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}
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return rc;
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}
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static int lan9662_otp_read(void *context, unsigned int offset,
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void *_val, size_t bytes)
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{
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struct lan9662_otp *otp = context;
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u8 *val = _val;
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uint8_t data;
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int i, rc = 0;
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lan9662_otp_power(otp, true);
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for (i = 0; i < bytes; i++) {
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rc = lan9662_otp_read_byte(otp, offset + i, &data);
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if (rc < 0)
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break;
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*val++ = data;
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}
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lan9662_otp_power(otp, false);
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return rc;
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}
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static int lan9662_otp_write(void *context, unsigned int offset,
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void *_val, size_t bytes)
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{
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struct lan9662_otp *otp = context;
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u8 *val = _val;
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u8 data, newdata;
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int i, rc = 0;
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lan9662_otp_power(otp, true);
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for (i = 0; i < bytes; i++) {
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/* Skip zero bytes */
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if (val[i]) {
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rc = lan9662_otp_read_byte(otp, offset + i, &data);
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if (rc < 0)
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break;
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newdata = data | val[i];
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if (newdata == data)
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continue;
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rc = lan9662_otp_write_byte(otp, offset + i,
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newdata);
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if (rc < 0)
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break;
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}
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}
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lan9662_otp_power(otp, false);
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return rc;
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}
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static struct nvmem_config otp_config = {
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.name = "lan9662-otp",
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.stride = 1,
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.word_size = 1,
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.reg_read = lan9662_otp_read,
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.reg_write = lan9662_otp_write,
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.size = OTP_MEM_SIZE,
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};
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static int lan9662_otp_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct nvmem_device *nvmem;
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struct lan9662_otp *otp;
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otp = devm_kzalloc(&pdev->dev, sizeof(*otp), GFP_KERNEL);
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if (!otp)
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return -ENOMEM;
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otp->dev = dev;
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otp->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(otp->base))
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return PTR_ERR(otp->base);
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otp_config.priv = otp;
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otp_config.dev = dev;
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nvmem = devm_nvmem_register(dev, &otp_config);
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return PTR_ERR_OR_ZERO(nvmem);
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}
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static const struct of_device_id lan9662_otp_match[] = {
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{ .compatible = "microchip,lan9662-otp", },
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{ },
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};
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MODULE_DEVICE_TABLE(of, lan9662_otp_match);
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static struct platform_driver lan9662_otp_driver = {
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.probe = lan9662_otp_probe,
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.driver = {
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.name = "lan9662-otp",
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.of_match_table = lan9662_otp_match,
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},
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};
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module_platform_driver(lan9662_otp_driver);
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MODULE_AUTHOR("Horatiu Vultur <horatiu.vultur@microchip.com>");
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MODULE_DESCRIPTION("lan9662 OTP driver");
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MODULE_LICENSE("GPL");
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