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dffbdf3775
The preferred integer types in the kernel are the Linux specific ones, switch from standard C types to u32 and alike. Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
417 lines
8.8 KiB
C
417 lines
8.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* drivers/media/i2c/ccs/ccs-reg-access.c
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*
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* Generic driver for MIPI CCS/SMIA/SMIA++ compliant camera sensors
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*
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* Copyright (C) 2020 Intel Corporation
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* Copyright (C) 2011--2012 Nokia Corporation
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* Contact: Sakari Ailus <sakari.ailus@linux.intel.com>
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*/
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#include <asm/unaligned.h>
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include "ccs.h"
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#include "ccs-limits.h"
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static u32 float_to_u32_mul_1000000(struct i2c_client *client, u32 phloat)
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{
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s32 exp;
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u64 man;
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if (phloat >= 0x80000000) {
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dev_err(&client->dev, "this is a negative number\n");
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return 0;
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}
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if (phloat == 0x7f800000)
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return ~0; /* Inf. */
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if ((phloat & 0x7f800000) == 0x7f800000) {
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dev_err(&client->dev, "NaN or other special number\n");
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return 0;
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}
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/* Valid cases begin here */
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if (phloat == 0)
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return 0; /* Valid zero */
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if (phloat > 0x4f800000)
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return ~0; /* larger than 4294967295 */
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/*
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* Unbias exponent (note how phloat is now guaranteed to
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* have 0 in the high bit)
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*/
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exp = ((int32_t)phloat >> 23) - 127;
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/* Extract mantissa, add missing '1' bit and it's in MHz */
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man = ((phloat & 0x7fffff) | 0x800000) * 1000000ULL;
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if (exp < 0)
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man >>= -exp;
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else
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man <<= exp;
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man >>= 23; /* Remove mantissa bias */
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return man & 0xffffffff;
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}
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/*
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* Read a 8/16/32-bit i2c register. The value is returned in 'val'.
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* Returns zero if successful, or non-zero otherwise.
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*/
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static int ____ccs_read_addr(struct ccs_sensor *sensor, u16 reg, u16 len,
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u32 *val)
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{
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struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
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struct i2c_msg msg;
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unsigned char data_buf[sizeof(u32)] = { 0 };
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unsigned char offset_buf[sizeof(u16)];
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int r;
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if (len > sizeof(data_buf))
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return -EINVAL;
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msg.addr = client->addr;
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msg.flags = 0;
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msg.len = sizeof(offset_buf);
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msg.buf = offset_buf;
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put_unaligned_be16(reg, offset_buf);
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r = i2c_transfer(client->adapter, &msg, 1);
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if (r != 1) {
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if (r >= 0)
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r = -EBUSY;
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goto err;
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}
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msg.len = len;
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msg.flags = I2C_M_RD;
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msg.buf = &data_buf[sizeof(data_buf) - len];
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r = i2c_transfer(client->adapter, &msg, 1);
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if (r != 1) {
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if (r >= 0)
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r = -EBUSY;
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goto err;
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}
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*val = get_unaligned_be32(data_buf);
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return 0;
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err:
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dev_err(&client->dev, "read from offset 0x%x error %d\n", reg, r);
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return r;
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}
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/* Read a register using 8-bit access only. */
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static int ____ccs_read_addr_8only(struct ccs_sensor *sensor, u16 reg,
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u16 len, u32 *val)
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{
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unsigned int i;
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int rval;
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*val = 0;
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for (i = 0; i < len; i++) {
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u32 val8;
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rval = ____ccs_read_addr(sensor, reg + i, 1, &val8);
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if (rval < 0)
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return rval;
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*val |= val8 << ((len - i - 1) << 3);
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}
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return 0;
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}
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unsigned int ccs_reg_width(u32 reg)
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{
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if (reg & CCS_FL_16BIT)
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return sizeof(u16);
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if (reg & CCS_FL_32BIT)
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return sizeof(u32);
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return sizeof(u8);
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}
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static u32 ireal32_to_u32_mul_1000000(struct i2c_client *client, u32 val)
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{
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if (val >> 10 > U32_MAX / 15625) {
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dev_warn(&client->dev, "value %u overflows!\n", val);
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return U32_MAX;
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}
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return ((val >> 10) * 15625) +
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(val & GENMASK(9, 0)) * 15625 / 1024;
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}
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u32 ccs_reg_conv(struct ccs_sensor *sensor, u32 reg, u32 val)
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{
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struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
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if (reg & CCS_FL_FLOAT_IREAL) {
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if (CCS_LIM(sensor, CLOCK_CAPA_TYPE_CAPABILITY) &
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CCS_CLOCK_CAPA_TYPE_CAPABILITY_IREAL)
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val = ireal32_to_u32_mul_1000000(client, val);
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else
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val = float_to_u32_mul_1000000(client, val);
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} else if (reg & CCS_FL_IREAL) {
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val = ireal32_to_u32_mul_1000000(client, val);
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}
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return val;
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}
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/*
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* Read a 8/16/32-bit i2c register. The value is returned in 'val'.
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* Returns zero if successful, or non-zero otherwise.
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*/
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static int __ccs_read_addr(struct ccs_sensor *sensor, u32 reg, u32 *val,
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bool only8, bool conv)
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{
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unsigned int len = ccs_reg_width(reg);
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int rval;
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if (!only8)
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rval = ____ccs_read_addr(sensor, CCS_REG_ADDR(reg), len, val);
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else
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rval = ____ccs_read_addr_8only(sensor, CCS_REG_ADDR(reg), len,
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val);
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if (rval < 0)
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return rval;
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if (!conv)
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return 0;
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*val = ccs_reg_conv(sensor, reg, *val);
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return 0;
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}
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static int __ccs_read_data(struct ccs_reg *regs, size_t num_regs,
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u32 reg, u32 *val)
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{
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unsigned int width = ccs_reg_width(reg);
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size_t i;
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for (i = 0; i < num_regs; i++, regs++) {
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u8 *data;
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if (regs->addr + regs->len < CCS_REG_ADDR(reg) + width)
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continue;
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if (regs->addr > CCS_REG_ADDR(reg))
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break;
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data = ®s->value[CCS_REG_ADDR(reg) - regs->addr];
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switch (width) {
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case sizeof(u8):
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*val = *data;
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break;
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case sizeof(u16):
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*val = get_unaligned_be16(data);
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break;
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case sizeof(u32):
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*val = get_unaligned_be32(data);
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break;
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default:
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WARN_ON(1);
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return -EINVAL;
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}
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return 0;
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}
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return -ENOENT;
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}
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static int ccs_read_data(struct ccs_sensor *sensor, u32 reg, u32 *val)
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{
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if (!__ccs_read_data(sensor->sdata.sensor_read_only_regs,
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sensor->sdata.num_sensor_read_only_regs,
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reg, val))
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return 0;
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return __ccs_read_data(sensor->mdata.module_read_only_regs,
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sensor->mdata.num_module_read_only_regs,
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reg, val);
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}
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static int ccs_read_addr_raw(struct ccs_sensor *sensor, u32 reg, u32 *val,
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bool force8, bool quirk, bool conv, bool data)
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{
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int rval;
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if (data) {
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rval = ccs_read_data(sensor, reg, val);
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if (!rval)
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return 0;
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}
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if (quirk) {
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*val = 0;
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rval = ccs_call_quirk(sensor, reg_access, false, ®, val);
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if (rval == -ENOIOCTLCMD)
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return 0;
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if (rval < 0)
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return rval;
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if (force8)
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return __ccs_read_addr(sensor, reg, val, true, conv);
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}
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return __ccs_read_addr(sensor, reg, val,
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ccs_needs_quirk(sensor,
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CCS_QUIRK_FLAG_8BIT_READ_ONLY),
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conv);
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}
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int ccs_read_addr(struct ccs_sensor *sensor, u32 reg, u32 *val)
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{
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return ccs_read_addr_raw(sensor, reg, val, false, true, true, true);
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}
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int ccs_read_addr_8only(struct ccs_sensor *sensor, u32 reg, u32 *val)
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{
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return ccs_read_addr_raw(sensor, reg, val, true, true, true, true);
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}
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int ccs_read_addr_noconv(struct ccs_sensor *sensor, u32 reg, u32 *val)
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{
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return ccs_read_addr_raw(sensor, reg, val, false, true, false, true);
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}
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static int ccs_write_retry(struct i2c_client *client, struct i2c_msg *msg)
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{
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unsigned int retries;
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int r;
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for (retries = 0; retries < 10; retries++) {
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/*
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* Due to unknown reason sensor stops responding. This
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* loop is a temporaty solution until the root cause
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* is found.
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*/
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r = i2c_transfer(client->adapter, msg, 1);
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if (r != 1) {
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usleep_range(1000, 2000);
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continue;
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}
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if (retries)
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dev_err(&client->dev,
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"sensor i2c stall encountered. retries: %d\n",
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retries);
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return 0;
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}
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return r;
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}
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int ccs_write_addr_no_quirk(struct ccs_sensor *sensor, u32 reg, u32 val)
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{
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struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
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struct i2c_msg msg;
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unsigned char data[6];
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unsigned int len = ccs_reg_width(reg);
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int r;
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if (len > sizeof(data) - 2)
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return -EINVAL;
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msg.addr = client->addr;
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msg.flags = 0; /* Write */
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msg.len = 2 + len;
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msg.buf = data;
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put_unaligned_be16(CCS_REG_ADDR(reg), data);
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put_unaligned_be32(val << (8 * (sizeof(val) - len)), data + 2);
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dev_dbg(&client->dev, "writing reg 0x%4.4x value 0x%*.*x (%u)\n",
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CCS_REG_ADDR(reg), ccs_reg_width(reg) << 1,
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ccs_reg_width(reg) << 1, val, val);
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r = ccs_write_retry(client, &msg);
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if (r)
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dev_err(&client->dev,
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"wrote 0x%x to offset 0x%x error %d\n", val,
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CCS_REG_ADDR(reg), r);
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return r;
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}
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/*
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* Write to a 8/16-bit register.
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* Returns zero if successful, or non-zero otherwise.
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*/
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int ccs_write_addr(struct ccs_sensor *sensor, u32 reg, u32 val)
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{
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int rval;
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rval = ccs_call_quirk(sensor, reg_access, true, ®, &val);
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if (rval == -ENOIOCTLCMD)
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return 0;
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if (rval < 0)
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return rval;
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return ccs_write_addr_no_quirk(sensor, reg, val);
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}
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#define MAX_WRITE_LEN 32U
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int ccs_write_data_regs(struct ccs_sensor *sensor, struct ccs_reg *regs,
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size_t num_regs)
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{
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struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
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unsigned char buf[2 + MAX_WRITE_LEN];
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struct i2c_msg msg = {
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.addr = client->addr,
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.buf = buf,
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};
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size_t i;
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for (i = 0; i < num_regs; i++, regs++) {
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unsigned char *regdata = regs->value;
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unsigned int j;
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for (j = 0; j < regs->len;
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j += msg.len - 2, regdata += msg.len - 2) {
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char printbuf[(MAX_WRITE_LEN << 1) +
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1 /* \0 */] = { 0 };
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int rval;
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msg.len = min(regs->len - j, MAX_WRITE_LEN);
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bin2hex(printbuf, regdata, msg.len);
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dev_dbg(&client->dev,
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"writing msr reg 0x%4.4x value 0x%s\n",
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regs->addr + j, printbuf);
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put_unaligned_be16(regs->addr + j, buf);
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memcpy(buf + 2, regdata, msg.len);
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msg.len += 2;
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rval = ccs_write_retry(client, &msg);
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if (rval) {
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dev_err(&client->dev,
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"error writing %u octets to address 0x%4.4x\n",
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msg.len, regs->addr + j);
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return rval;
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}
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}
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}
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return 0;
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}
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