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When running the rfi_flush test, if the system is loaded, we see two issues: 1. The L1d misses when rfi_flush is disabled increase significantly due to other workloads interfering with the cache. 2. The L1d misses when rfi_flush is enabled sometimes goes slightly below the expected number of misses. To address these, let's relax the expected number of L1d misses: 1. When rfi_flush is disabled, we allow upto half the expected number of the misses for when rfi_flush is enabled. 2. When rfi_flush is enabled, we allow ~1% lower number of cache misses. Reported-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Tested-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
141 lines
3.1 KiB
C
141 lines
3.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2018 IBM Corporation.
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*/
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#define __SANE_USERSPACE_TYPES__
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#include <sys/types.h>
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#include <stdint.h>
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#include <malloc.h>
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#include <unistd.h>
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#include <stdlib.h>
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#include <string.h>
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#include <stdio.h>
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#include "utils.h"
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#define CACHELINE_SIZE 128
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struct perf_event_read {
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__u64 nr;
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__u64 l1d_misses;
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};
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static inline __u64 load(void *addr)
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{
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__u64 tmp;
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asm volatile("ld %0,0(%1)" : "=r"(tmp) : "b"(addr));
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return tmp;
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}
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static void syscall_loop(char *p, unsigned long iterations,
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unsigned long zero_size)
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{
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for (unsigned long i = 0; i < iterations; i++) {
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for (unsigned long j = 0; j < zero_size; j += CACHELINE_SIZE)
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load(p + j);
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getppid();
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}
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}
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int rfi_flush_test(void)
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{
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char *p;
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int repetitions = 10;
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int fd, passes = 0, iter, rc = 0;
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struct perf_event_read v;
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__u64 l1d_misses_total = 0;
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unsigned long iterations = 100000, zero_size = 24 * 1024;
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unsigned long l1d_misses_expected;
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int rfi_flush_org, rfi_flush;
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SKIP_IF(geteuid() != 0);
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if (read_debugfs_file("powerpc/rfi_flush", &rfi_flush_org)) {
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perror("Unable to read powerpc/rfi_flush debugfs file");
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SKIP_IF(1);
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}
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rfi_flush = rfi_flush_org;
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fd = perf_event_open_counter(PERF_TYPE_RAW, /* L1d miss */ 0x400f0, -1);
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FAIL_IF(fd < 0);
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p = (char *)memalign(zero_size, CACHELINE_SIZE);
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FAIL_IF(perf_event_enable(fd));
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set_dscr(1);
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iter = repetitions;
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/*
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* We expect to see l1d miss for each cacheline access when rfi_flush
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* is set. Allow a small variation on this.
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*/
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l1d_misses_expected = iterations * (zero_size / CACHELINE_SIZE - 2);
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again:
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FAIL_IF(perf_event_reset(fd));
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syscall_loop(p, iterations, zero_size);
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FAIL_IF(read(fd, &v, sizeof(v)) != sizeof(v));
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if (rfi_flush && v.l1d_misses >= l1d_misses_expected)
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passes++;
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else if (!rfi_flush && v.l1d_misses < (l1d_misses_expected / 2))
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passes++;
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l1d_misses_total += v.l1d_misses;
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while (--iter)
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goto again;
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if (passes < repetitions) {
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printf("FAIL (L1D misses with rfi_flush=%d: %llu %c %lu) [%d/%d failures]\n",
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rfi_flush, l1d_misses_total, rfi_flush ? '<' : '>',
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rfi_flush ? repetitions * l1d_misses_expected :
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repetitions * l1d_misses_expected / 2,
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repetitions - passes, repetitions);
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rc = 1;
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} else
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printf("PASS (L1D misses with rfi_flush=%d: %llu %c %lu) [%d/%d pass]\n",
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rfi_flush, l1d_misses_total, rfi_flush ? '>' : '<',
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rfi_flush ? repetitions * l1d_misses_expected :
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repetitions * l1d_misses_expected / 2,
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passes, repetitions);
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if (rfi_flush == rfi_flush_org) {
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rfi_flush = !rfi_flush_org;
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if (write_debugfs_file("powerpc/rfi_flush", rfi_flush) < 0) {
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perror("error writing to powerpc/rfi_flush debugfs file");
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return 1;
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}
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iter = repetitions;
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l1d_misses_total = 0;
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passes = 0;
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goto again;
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}
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perf_event_disable(fd);
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close(fd);
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set_dscr(0);
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if (write_debugfs_file("powerpc/rfi_flush", rfi_flush_org) < 0) {
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perror("unable to restore original value of powerpc/rfi_flush debugfs file");
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return 1;
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}
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return rc;
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}
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int main(int argc, char *argv[])
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{
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return test_harness(rfi_flush_test, "rfi_flush_test");
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}
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