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We are using legacy way of exposing dais and DMA configuration that requires separate driver modules for various ACP SOC with almost similar hw configuration. Moreover the legacy approach requires separate I2S and DMA module platform devices registration and need machine specific quirk to control various I2S endpoints. Add generic dai driver and platform driver for I2S controller on ACP hw block. This common framework can be used by various ACP platform devices that shares common specs. Signed-off-by: Ajit Kumar Pandey <AjitKumar.Pandey@amd.com> Link: https://lore.kernel.org/r/20211019070938.5076-2-AjitKumar.Pandey@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
77 lines
3.7 KiB
C
77 lines
3.7 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
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/*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* Copyright(c) 2021 Advanced Micro Devices, Inc. All rights reserved.
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*
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* Author: Ajit Kumar Pandey <AjitKumar.Pandey@amd.com>
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*/
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#ifndef _ACP_IP_OFFSET_HEADER
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#define _ACP_IP_OFFSET_HEADER
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#define ACPAXI2AXI_ATU_CTRL 0xC40
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#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_5 0xC20
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#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_5 0xC24
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#define ACP_EXTERNAL_INTR_ENB 0x1800
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#define ACP_EXTERNAL_INTR_CNTL 0x1804
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#define ACP_EXTERNAL_INTR_STAT 0x1808
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#define ACP_I2S_PIN_CONFIG 0x1400
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#define ACP_SCRATCH_REG_0 0x12800
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/* Registers from ACP_AUDIO_BUFFERS block */
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#define ACP_I2S_RX_RINGBUFADDR 0x2000
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#define ACP_I2S_RX_RINGBUFSIZE 0x2004
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#define ACP_I2S_RX_LINKPOSITIONCNTR 0x2008
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#define ACP_I2S_RX_FIFOADDR 0x200C
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#define ACP_I2S_RX_FIFOSIZE 0x2010
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#define ACP_I2S_RX_DMA_SIZE 0x2014
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#define ACP_I2S_RX_LINEARPOSITIONCNTR_HIGH 0x2018
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#define ACP_I2S_RX_LINEARPOSITIONCNTR_LOW 0x201C
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#define ACP_I2S_RX_INTR_WATERMARK_SIZE 0x2020
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#define ACP_I2S_TX_RINGBUFADDR 0x2024
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#define ACP_I2S_TX_RINGBUFSIZE 0x2028
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#define ACP_I2S_TX_LINKPOSITIONCNTR 0x202C
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#define ACP_I2S_TX_FIFOADDR 0x2030
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#define ACP_I2S_TX_FIFOSIZE 0x2034
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#define ACP_I2S_TX_DMA_SIZE 0x2038
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#define ACP_I2S_TX_LINEARPOSITIONCNTR_HIGH 0x203C
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#define ACP_I2S_TX_LINEARPOSITIONCNTR_LOW 0x2040
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#define ACP_I2S_TX_INTR_WATERMARK_SIZE 0x2044
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#define ACP_BT_RX_RINGBUFADDR 0x2048
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#define ACP_BT_RX_RINGBUFSIZE 0x204C
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#define ACP_BT_RX_LINKPOSITIONCNTR 0x2050
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#define ACP_BT_RX_FIFOADDR 0x2054
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#define ACP_BT_RX_FIFOSIZE 0x2058
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#define ACP_BT_RX_DMA_SIZE 0x205C
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#define ACP_BT_RX_LINEARPOSITIONCNTR_HIGH 0x2060
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#define ACP_BT_RX_LINEARPOSITIONCNTR_LOW 0x2064
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#define ACP_BT_RX_INTR_WATERMARK_SIZE 0x2068
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#define ACP_BT_TX_RINGBUFADDR 0x206C
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#define ACP_BT_TX_RINGBUFSIZE 0x2070
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#define ACP_BT_TX_LINKPOSITIONCNTR 0x2074
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#define ACP_BT_TX_FIFOADDR 0x2078
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#define ACP_BT_TX_FIFOSIZE 0x207C
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#define ACP_BT_TX_DMA_SIZE 0x2080
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#define ACP_BT_TX_LINEARPOSITIONCNTR_HIGH 0x2084
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#define ACP_BT_TX_LINEARPOSITIONCNTR_LOW 0x2088
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#define ACP_BT_TX_INTR_WATERMARK_SIZE 0x208C
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#define ACP_I2STDM_IER 0x2400
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#define ACP_I2STDM_IRER 0x2404
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#define ACP_I2STDM_RXFRMT 0x2408
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#define ACP_I2STDM_ITER 0x240C
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#define ACP_I2STDM_TXFRMT 0x2410
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/* Registers from ACP_BT_TDM block */
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#define ACP_BTTDM_IER 0x2800
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#define ACP_BTTDM_IRER 0x2804
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#define ACP_BTTDM_RXFRMT 0x2808
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#define ACP_BTTDM_ITER 0x280C
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#define ACP_BTTDM_TXFRMT 0x2810
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#endif
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