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1361d75503
Otherwise when when clk_i2s0 muxes to clk_i2s0_div which requires setting high divider value on clk_i2s0_div, and then muxes back to clk_i2s0_frac, clk_i2s0_frac would have no way to change the clk_i2s0_div's divider ratio back to 1 so that it can satisfy the condition for m/n > 20 for fractional division to work correctly. Bug is reproducible by playing 44.1k audio, then 48k audio, and then 44.1k audio again. This results in clk_i2s0_div being set to 49 and clk_i2s0_frac not being able to cope with such a low input clock rate and audio playing extremely slowly. The identical issue is on i2s1 and i2s2 clocks, too. Signed-off-by: Ondrej Jirman <megi@xff.cz> Link: https://lore.kernel.org/r/20240217193439.1762213-1-megi@xff.cz Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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| .. | ||
| clk-cpu.c | ||
| clk-ddr.c | ||
| clk-half-divider.c | ||
| clk-inverter.c | ||
| clk-mmc-phase.c | ||
| clk-muxgrf.c | ||
| clk-pll.c | ||
| clk-px30.c | ||
| clk-rk3036.c | ||
| clk-rk3128.c | ||
| clk-rk3188.c | ||
| clk-rk3228.c | ||
| clk-rk3288.c | ||
| clk-rk3308.c | ||
| clk-rk3328.c | ||
| clk-rk3368.c | ||
| clk-rk3399.c | ||
| clk-rk3568.c | ||
| clk-rk3588.c | ||
| clk-rv1108.c | ||
| clk-rv1126.c | ||
| clk.c | ||
| clk.h | ||
| Kconfig | ||
| Makefile | ||
| rst-rk3588.c | ||
| softrst.c | ||