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a83fdfae5a
* clk-davinci: clk: davinci: Remove redundant dev_err calls clk: davinci: cfgchip: Add TI DA8XX USB PHY clocks clk: davinci: New driver for TI DA8XX CFGCHIP clocks dt-bindings: clock: Add bindings for DA8XX CFGCHIP clocks clk: davinci: Add platform information for TI DM646x PSC clk: davinci: Add platform information for TI DM644x PSC clk: davinci: Add platform information for TI DM365 PSC clk: davinci: Add platform information for TI DM355 PSC clk: davinci: Add platform information for TI DA850 PSC clk: davinci: Add platform information for TI DA830 PSC clk: davinci: New driver for davinci PSC clocks dt-bindings: clock: New bindings for TI Davinci PSC clk: davinci: Add platform information for TI DM646x PLL clk: davinci: Add platform information for TI DM644x PLL clk: davinci: Add platform information for TI DM365 PLL clk: davinci: Add platform information for TI DM355 PLL clk: davinci: Add platform information for TI DA850 PLL clk: davinci: Add platform information for TI DA830 PLL clk: davinci: New driver for davinci PLL clocks dt-bindings: clock: Add new bindings for TI Davinci PLL clocks * clk-si544: clk: Add driver for the si544 clock generator chip * clk-rockchip: clk: rockchip: assign correct id for pclk_ddr and hclk_sd in rk3399 clk: rockchip: Fix error return in phase clock registration clk: rockchip: Correct the behaviour of restoring cached phase clk: rockchip: Fix wrong parents for MMC phase clock for rk3328 clk: rockchip: Fix wrong parent for SDMMC phase clock for rk3228 clk: rockchip: Add 1.6GHz PLL rate for rk3399 clk: rockchip: Restore the clock phase after the rate was changed clk: rockchip: Prevent calculating mmc phase if clock rate is zero clk: rockchip: Free the memory on the error path clk: rockchip: document hdmi_phy external input for rk3328 clk: rockchip: add flags for rk3328 dclk_lcdc clk: rockchip: remove ignore_unused flag from rk3328 vio_h2p clocks clk: rockchip: protect all remaining rk3328 interconnect clocks clk: rockchip: export sclk_hdmi_sfc on rk3328 clk: rockchip: remove HCLK_VIO from rk3328 dt header clk: rockchip: fix hclk_vio_niu on rk3328 * clk-uniphier: clk: uniphier: add additional ethernet clock lines for Pro4 clk: uniphier: add SATA clock control support clk: uniphier: add PCIe clock control support clk: uniphier: add ethernet clock control support for PXs3 clk: uniphier: add Pro4/Pro5/PXs2 audio system clock * clk-ti-flag-fix: clk: ti: fix flag space conflict with clkctrl clocks clk: ti: clkctrl: add support for CLK_SET_RATE_PARENT flag
106 lines
4.1 KiB
Makefile
106 lines
4.1 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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# common clock types
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obj-$(CONFIG_HAVE_CLK) += clk-devres.o clk-bulk.o
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obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o
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obj-$(CONFIG_COMMON_CLK) += clk.o
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obj-$(CONFIG_COMMON_CLK) += clk-divider.o
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obj-$(CONFIG_COMMON_CLK) += clk-fixed-factor.o
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obj-$(CONFIG_COMMON_CLK) += clk-fixed-rate.o
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obj-$(CONFIG_COMMON_CLK) += clk-gate.o
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obj-$(CONFIG_COMMON_CLK) += clk-multiplier.o
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obj-$(CONFIG_COMMON_CLK) += clk-mux.o
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obj-$(CONFIG_COMMON_CLK) += clk-composite.o
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obj-$(CONFIG_COMMON_CLK) += clk-fractional-divider.o
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obj-$(CONFIG_COMMON_CLK) += clk-gpio.o
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ifeq ($(CONFIG_OF), y)
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obj-$(CONFIG_COMMON_CLK) += clk-conf.o
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endif
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# hardware specific clock types
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# please keep this section sorted lexicographically by file path name
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obj-$(CONFIG_MACH_ASM9260) += clk-asm9260.o
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obj-$(CONFIG_COMMON_CLK_AXI_CLKGEN) += clk-axi-clkgen.o
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obj-$(CONFIG_ARCH_AXXIA) += clk-axm5516.o
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obj-$(CONFIG_COMMON_CLK_CDCE706) += clk-cdce706.o
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obj-$(CONFIG_COMMON_CLK_CDCE925) += clk-cdce925.o
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obj-$(CONFIG_ARCH_CLPS711X) += clk-clps711x.o
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obj-$(CONFIG_COMMON_CLK_CS2000_CP) += clk-cs2000-cp.o
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obj-$(CONFIG_ARCH_EFM32) += clk-efm32gg.o
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obj-$(CONFIG_COMMON_CLK_GEMINI) += clk-gemini.o
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obj-$(CONFIG_COMMON_CLK_ASPEED) += clk-aspeed.o
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obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o
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obj-$(CONFIG_CLK_HSDK) += clk-hsdk-pll.o
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obj-$(CONFIG_COMMON_CLK_MAX77686) += clk-max77686.o
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obj-$(CONFIG_ARCH_MOXART) += clk-moxart.o
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obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o
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obj-$(CONFIG_ARCH_NSPIRE) += clk-nspire.o
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obj-$(CONFIG_COMMON_CLK_OXNAS) += clk-oxnas.o
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obj-$(CONFIG_COMMON_CLK_PALMAS) += clk-palmas.o
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obj-$(CONFIG_COMMON_CLK_PWM) += clk-pwm.o
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obj-$(CONFIG_CLK_QORIQ) += clk-qoriq.o
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obj-$(CONFIG_COMMON_CLK_RK808) += clk-rk808.o
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obj-$(CONFIG_COMMON_CLK_HI655X) += clk-hi655x.o
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obj-$(CONFIG_COMMON_CLK_S2MPS11) += clk-s2mps11.o
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obj-$(CONFIG_COMMON_CLK_SCPI) += clk-scpi.o
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obj-$(CONFIG_COMMON_CLK_SI5351) += clk-si5351.o
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obj-$(CONFIG_COMMON_CLK_SI514) += clk-si514.o
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obj-$(CONFIG_COMMON_CLK_SI544) += clk-si544.o
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obj-$(CONFIG_COMMON_CLK_SI570) += clk-si570.o
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obj-$(CONFIG_COMMON_CLK_STM32F) += clk-stm32f4.o
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obj-$(CONFIG_COMMON_CLK_STM32H7) += clk-stm32h7.o
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obj-$(CONFIG_COMMON_CLK_STM32MP157) += clk-stm32mp1.o
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obj-$(CONFIG_ARCH_TANGO) += clk-tango4.o
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obj-$(CONFIG_CLK_TWL6040) += clk-twl6040.o
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obj-$(CONFIG_ARCH_U300) += clk-u300.o
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obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o
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obj-$(CONFIG_COMMON_CLK_VC5) += clk-versaclock5.o
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obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o
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obj-$(CONFIG_COMMON_CLK_XGENE) += clk-xgene.o
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# please keep this section sorted lexicographically by directory path name
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obj-$(CONFIG_COMMON_CLK_AT91) += at91/
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obj-$(CONFIG_ARCH_ARTPEC) += axis/
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obj-$(CONFIG_ARC_PLAT_AXS10X) += axs10x/
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obj-y += bcm/
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obj-$(CONFIG_ARCH_BERLIN) += berlin/
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obj-$(CONFIG_ARCH_DAVINCI) += davinci/
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obj-$(CONFIG_H8300) += h8300/
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obj-$(CONFIG_ARCH_HISI) += hisilicon/
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obj-y += imgtec/
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obj-$(CONFIG_ARCH_MXC) += imx/
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obj-$(CONFIG_MACH_INGENIC) += ingenic/
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obj-$(CONFIG_ARCH_KEYSTONE) += keystone/
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obj-$(CONFIG_MACH_LOONGSON32) += loongson1/
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obj-y += mediatek/
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obj-$(CONFIG_COMMON_CLK_AMLOGIC) += meson/
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obj-$(CONFIG_MACH_PIC32) += microchip/
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ifeq ($(CONFIG_COMMON_CLK), y)
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obj-$(CONFIG_ARCH_MMP) += mmp/
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endif
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obj-y += mvebu/
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obj-$(CONFIG_ARCH_MXS) += mxs/
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obj-$(CONFIG_COMMON_CLK_NXP) += nxp/
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obj-$(CONFIG_MACH_PISTACHIO) += pistachio/
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obj-$(CONFIG_COMMON_CLK_PXA) += pxa/
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obj-$(CONFIG_COMMON_CLK_QCOM) += qcom/
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obj-y += renesas/
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obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
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obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/
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obj-$(CONFIG_ARCH_SIRF) += sirf/
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obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/
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obj-$(CONFIG_PLAT_SPEAR) += spear/
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obj-$(CONFIG_ARCH_SPRD) += sprd/
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obj-$(CONFIG_ARCH_STI) += st/
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obj-$(CONFIG_ARCH_SUNXI) += sunxi/
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obj-$(CONFIG_ARCH_SUNXI) += sunxi-ng/
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obj-$(CONFIG_ARCH_TEGRA) += tegra/
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obj-y += ti/
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obj-$(CONFIG_CLK_UNIPHIER) += uniphier/
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obj-$(CONFIG_ARCH_U8500) += ux500/
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obj-$(CONFIG_COMMON_CLK_VERSATILE) += versatile/
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ifeq ($(CONFIG_COMMON_CLK), y)
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obj-$(CONFIG_X86) += x86/
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endif
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obj-$(CONFIG_ARCH_ZX) += zte/
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obj-$(CONFIG_ARCH_ZYNQ) += zynq/
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