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This driver enables r5f dual core Real time Processing Unit subsystem available on Xilinx Zynq Ultrascale MPSoC Platform. RPU subsystem (cluster) can be configured in different modes e.g. split mode in which two r5f cores work independent of each other and lock-step mode in which both r5f cores execute same code clock-for-clock and notify if the result is different. The Xilinx r5 Remoteproc Driver boots the RPU cores via calls to the Xilinx Platform Management Unit that handles the R5 configuration, memory access and R5 lifecycle management. The interface to this manager is done in this driver via zynqmp_pm_* function calls. Signed-off-by: Ben Levinsky <ben.levinsky@amd.com> Signed-off-by: Tanmay Shah <tanmay.shah@amd.com> Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/r/20221114233940.2096237-7-tanmay.shah@amd.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
42 lines
1.8 KiB
Makefile
42 lines
1.8 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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#
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# Generic framework for controlling remote processors
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#
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obj-$(CONFIG_REMOTEPROC) += remoteproc.o
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remoteproc-y := remoteproc_core.o
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remoteproc-y += remoteproc_coredump.o
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remoteproc-y += remoteproc_debugfs.o
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remoteproc-y += remoteproc_sysfs.o
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remoteproc-y += remoteproc_virtio.o
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remoteproc-y += remoteproc_elf_loader.o
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obj-$(CONFIG_REMOTEPROC_CDEV) += remoteproc_cdev.o
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obj-$(CONFIG_IMX_REMOTEPROC) += imx_rproc.o
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obj-$(CONFIG_IMX_DSP_REMOTEPROC) += imx_dsp_rproc.o
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obj-$(CONFIG_INGENIC_VPU_RPROC) += ingenic_rproc.o
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obj-$(CONFIG_MTK_SCP) += mtk_scp.o mtk_scp_ipi.o
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obj-$(CONFIG_OMAP_REMOTEPROC) += omap_remoteproc.o
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obj-$(CONFIG_WKUP_M3_RPROC) += wkup_m3_rproc.o
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obj-$(CONFIG_DA8XX_REMOTEPROC) += da8xx_remoteproc.o
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obj-$(CONFIG_KEYSTONE_REMOTEPROC) += keystone_remoteproc.o
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obj-$(CONFIG_MESON_MX_AO_ARC_REMOTEPROC)+= meson_mx_ao_arc.o
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obj-$(CONFIG_PRU_REMOTEPROC) += pru_rproc.o
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obj-$(CONFIG_QCOM_PIL_INFO) += qcom_pil_info.o
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obj-$(CONFIG_QCOM_RPROC_COMMON) += qcom_common.o
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obj-$(CONFIG_QCOM_Q6V5_COMMON) += qcom_q6v5.o
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obj-$(CONFIG_QCOM_Q6V5_ADSP) += qcom_q6v5_adsp.o
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obj-$(CONFIG_QCOM_Q6V5_MSS) += qcom_q6v5_mss.o
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obj-$(CONFIG_QCOM_Q6V5_PAS) += qcom_q6v5_pas.o
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obj-$(CONFIG_QCOM_Q6V5_WCSS) += qcom_q6v5_wcss.o
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obj-$(CONFIG_QCOM_SYSMON) += qcom_sysmon.o
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obj-$(CONFIG_QCOM_WCNSS_PIL) += qcom_wcnss_pil.o
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qcom_wcnss_pil-y += qcom_wcnss.o
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qcom_wcnss_pil-y += qcom_wcnss_iris.o
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obj-$(CONFIG_RCAR_REMOTEPROC) += rcar_rproc.o
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obj-$(CONFIG_ST_REMOTEPROC) += st_remoteproc.o
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obj-$(CONFIG_ST_SLIM_REMOTEPROC) += st_slim_rproc.o
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obj-$(CONFIG_STM32_RPROC) += stm32_rproc.o
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obj-$(CONFIG_TI_K3_DSP_REMOTEPROC) += ti_k3_dsp_remoteproc.o
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obj-$(CONFIG_TI_K3_R5_REMOTEPROC) += ti_k3_r5_remoteproc.o
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obj-$(CONFIG_XLNX_R5_REMOTEPROC) += xlnx_r5_remoteproc.o
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