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a6eb9fe105
Now each architecture has the own dma_get_cache_alignment implementation. dma_get_cache_alignment returns the minimum DMA alignment. Architectures define it as ARCH_KMALLOC_MINALIGN (it's used to make sure that malloc'ed buffer is DMA-safe; the buffer doesn't share a cache with the others). So we can unify dma_get_cache_alignment implementations. This patch: dma_get_cache_alignment() needs to know if an architecture defines ARCH_KMALLOC_MINALIGN or not (needs to know if architecture has DMA alignment restriction). However, slab.h define ARCH_KMALLOC_MINALIGN if architectures doesn't define it. Let's rename ARCH_KMALLOC_MINALIGN to ARCH_DMA_MINALIGN. ARCH_KMALLOC_MINALIGN is used only in the internals of slab/slob/slub (except for crypto). Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
197 lines
5.7 KiB
C
197 lines
5.7 KiB
C
#ifndef __ASM_SH_PAGE_H
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#define __ASM_SH_PAGE_H
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/*
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* Copyright (C) 1999 Niibe Yutaka
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*/
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#include <linux/const.h>
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/* PAGE_SHIFT determines the page size */
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#if defined(CONFIG_PAGE_SIZE_4KB)
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# define PAGE_SHIFT 12
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#elif defined(CONFIG_PAGE_SIZE_8KB)
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# define PAGE_SHIFT 13
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#elif defined(CONFIG_PAGE_SIZE_16KB)
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# define PAGE_SHIFT 14
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#elif defined(CONFIG_PAGE_SIZE_64KB)
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# define PAGE_SHIFT 16
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#else
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# error "Bogus kernel page size?"
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#endif
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#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
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#define PAGE_MASK (~(PAGE_SIZE-1))
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#define PTE_MASK PAGE_MASK
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#if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
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#define HPAGE_SHIFT 16
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#elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K)
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#define HPAGE_SHIFT 18
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#elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
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#define HPAGE_SHIFT 20
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#elif defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
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#define HPAGE_SHIFT 22
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#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB)
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#define HPAGE_SHIFT 26
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#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512MB)
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#define HPAGE_SHIFT 29
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#endif
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#ifdef CONFIG_HUGETLB_PAGE
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#define HPAGE_SIZE (1UL << HPAGE_SHIFT)
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#define HPAGE_MASK (~(HPAGE_SIZE-1))
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#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT-PAGE_SHIFT)
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#endif
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#ifndef __ASSEMBLY__
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#include <asm/uncached.h>
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extern unsigned long shm_align_mask;
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extern unsigned long max_low_pfn, min_low_pfn;
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extern unsigned long memory_start, memory_end, memory_limit;
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static inline unsigned long
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pages_do_alias(unsigned long addr1, unsigned long addr2)
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{
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return (addr1 ^ addr2) & shm_align_mask;
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}
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#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE)
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extern void copy_page(void *to, void *from);
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struct page;
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struct vm_area_struct;
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extern void copy_user_highpage(struct page *to, struct page *from,
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unsigned long vaddr, struct vm_area_struct *vma);
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#define __HAVE_ARCH_COPY_USER_HIGHPAGE
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extern void clear_user_highpage(struct page *page, unsigned long vaddr);
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#define clear_user_highpage clear_user_highpage
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/*
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* These are used to make use of C type-checking..
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*/
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#ifdef CONFIG_X2TLB
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typedef struct { unsigned long pte_low, pte_high; } pte_t;
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typedef struct { unsigned long long pgprot; } pgprot_t;
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typedef struct { unsigned long long pgd; } pgd_t;
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#define pte_val(x) \
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((x).pte_low | ((unsigned long long)(x).pte_high << 32))
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#define __pte(x) \
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({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; })
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#elif defined(CONFIG_SUPERH32)
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typedef struct { unsigned long pte_low; } pte_t;
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typedef struct { unsigned long pgprot; } pgprot_t;
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typedef struct { unsigned long pgd; } pgd_t;
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#define pte_val(x) ((x).pte_low)
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#define __pte(x) ((pte_t) { (x) } )
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#else
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typedef struct { unsigned long long pte_low; } pte_t;
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typedef struct { unsigned long long pgprot; } pgprot_t;
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typedef struct { unsigned long pgd; } pgd_t;
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#define pte_val(x) ((x).pte_low)
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#define __pte(x) ((pte_t) { (x) } )
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#endif
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#define pgd_val(x) ((x).pgd)
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#define pgprot_val(x) ((x).pgprot)
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#define __pgd(x) ((pgd_t) { (x) } )
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#define __pgprot(x) ((pgprot_t) { (x) } )
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typedef struct page *pgtable_t;
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#define pte_pgprot(x) __pgprot(pte_val(x) & PTE_FLAGS_MASK)
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#endif /* !__ASSEMBLY__ */
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/*
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* __MEMORY_START and SIZE are the physical addresses and size of RAM.
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*/
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#define __MEMORY_START CONFIG_MEMORY_START
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#define __MEMORY_SIZE CONFIG_MEMORY_SIZE
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/*
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* PAGE_OFFSET is the virtual address of the start of kernel address
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* space.
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*/
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#define PAGE_OFFSET CONFIG_PAGE_OFFSET
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/*
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* Virtual to physical RAM address translation.
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*
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* In 29 bit mode, the physical offset of RAM from address 0 is visible in
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* the kernel virtual address space, and thus we don't have to take
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* this into account when translating. However in 32 bit mode this offset
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* is not visible (it is part of the PMB mapping) and so needs to be
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* added or subtracted as required.
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*/
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#ifdef CONFIG_PMB
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#define ___pa(x) ((x)-PAGE_OFFSET+__MEMORY_START)
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#define ___va(x) ((x)+PAGE_OFFSET-__MEMORY_START)
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#else
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#define ___pa(x) ((x)-PAGE_OFFSET)
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#define ___va(x) ((x)+PAGE_OFFSET)
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#endif
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#ifndef __ASSEMBLY__
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#define __pa(x) ___pa((unsigned long)x)
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#define __va(x) (void *)___va((unsigned long)x)
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#endif /* !__ASSEMBLY__ */
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#ifdef CONFIG_UNCACHED_MAPPING
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#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + uncached_start)
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#define CAC_ADDR(addr) ((addr) - uncached_start + PAGE_OFFSET)
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#else
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#define UNCAC_ADDR(addr) ((addr))
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#define CAC_ADDR(addr) ((addr))
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#endif
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#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
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#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
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/*
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* PFN = physical frame number (ie PFN 0 == physical address 0)
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* PFN_START is the PFN of the first page of RAM. By defining this we
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* don't have struct page entries for the portion of address space
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* between physical address 0 and the start of RAM.
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*/
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#define PFN_START (__MEMORY_START >> PAGE_SHIFT)
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#define ARCH_PFN_OFFSET (PFN_START)
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#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
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#ifdef CONFIG_FLATMEM
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#define pfn_valid(pfn) ((pfn) >= min_low_pfn && (pfn) < max_low_pfn)
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#endif
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#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
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#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
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VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
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#include <asm-generic/memory_model.h>
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#include <asm-generic/getorder.h>
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/* vDSO support */
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#ifdef CONFIG_VSYSCALL
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#define __HAVE_ARCH_GATE_AREA
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#endif
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/*
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* Some drivers need to perform DMA into kmalloc'ed buffers
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* and so we have to increase the kmalloc minalign for this.
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*/
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#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
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#ifdef CONFIG_SUPERH64
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/*
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* While BYTES_PER_WORD == 4 on the current sh64 ABI, GCC will still
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* happily generate {ld/st}.q pairs, requiring us to have 8-byte
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* alignment to avoid traps. The kmalloc alignment is gauranteed by
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* virtue of L1_CACHE_BYTES, requiring this to only be special cased
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* for slab caches.
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*/
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#define ARCH_SLAB_MINALIGN 8
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#endif
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#endif /* __ASM_SH_PAGE_H */
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