mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-12-02 16:44:10 +08:00
0555a6be06
Removale of skeleton.dtsi allows us also to fix the following warning from the dts compiler: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name by adding proper unit addresses to the memory nodes. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Acked-by: Rob Herring <robh@kernel.org>
222 lines
3.5 KiB
Plaintext
222 lines
3.5 KiB
Plaintext
/*
|
|
* CIAA NXP LPC4337 (http://www.proyecto-ciaa.com.ar)
|
|
*
|
|
* Copyright (C) 2015 VanguardiaSur - www.vanguardiasur.com.ar
|
|
*
|
|
* This code is released using a dual license strategy: BSD/GPL
|
|
* You can choose the licence that better fits your requirements.
|
|
*
|
|
* Released under the terms of 3-clause BSD License
|
|
* Released under the terms of GNU General Public License Version 2.0
|
|
*/
|
|
/dts-v1/;
|
|
|
|
#include "lpc18xx.dtsi"
|
|
#include "lpc4357.dtsi"
|
|
|
|
#include "dt-bindings/gpio/gpio.h"
|
|
|
|
/ {
|
|
model = "CIAA NXP LPC4337";
|
|
compatible = "ciaa,lpc4337", "nxp,lpc4337", "nxp,lpc4350";
|
|
|
|
aliases {
|
|
serial0 = &uart2;
|
|
serial1 = &uart3;
|
|
};
|
|
|
|
chosen {
|
|
bootargs = "console=ttyS0,115200 earlyprintk";
|
|
stdout-path = &uart2;
|
|
};
|
|
|
|
memory@28000000 {
|
|
device_type = "memory";
|
|
reg = <0x28000000 0x0800000>; /* 8 MB */
|
|
};
|
|
};
|
|
|
|
&pinctrl {
|
|
enet_rmii_pins: enet-rmii-pins {
|
|
enet_rmii_rxd_cfg {
|
|
pins = "p1_15", "p0_0";
|
|
function = "enet";
|
|
slew-rate = <1>;
|
|
bias-disable;
|
|
input-enable;
|
|
input-schmitt-disable;
|
|
};
|
|
|
|
enet_rmii_txd_cfg {
|
|
pins = "p1_18", "p1_20";
|
|
function = "enet";
|
|
slew-rate = <1>;
|
|
bias-disable;
|
|
input-enable;
|
|
input-schmitt-disable;
|
|
};
|
|
|
|
enet_rmii_rx_dv_cfg {
|
|
pins = "p1_16";
|
|
function = "enet";
|
|
bias-disable;
|
|
input-enable;
|
|
input-schmitt-disable;
|
|
};
|
|
|
|
enet_rmii_tx_en_cfg {
|
|
pins = "p0_1";
|
|
function = "enet";
|
|
bias-disable;
|
|
input-enable;
|
|
input-schmitt-disable;
|
|
};
|
|
|
|
enet_ref_clk_cfg {
|
|
pins = "p1_19";
|
|
function = "enet";
|
|
slew-rate = <1>;
|
|
bias-disable;
|
|
input-enable;
|
|
input-schmitt-disable;
|
|
};
|
|
|
|
enet_mdio_cfg {
|
|
pins = "p1_17";
|
|
function = "enet";
|
|
bias-disable;
|
|
input-enable;
|
|
input-schmitt-disable;
|
|
};
|
|
|
|
enet_mdc_cfg {
|
|
pins = "p7_7";
|
|
function = "enet";
|
|
slew-rate = <1>;
|
|
bias-disable;
|
|
input-enable;
|
|
input-schmitt-disable;
|
|
};
|
|
};
|
|
|
|
i2c0_pins: i2c0-pins {
|
|
i2c0_pins_cfg {
|
|
pins = "i2c0_scl", "i2c0_sda";
|
|
function = "i2c0";
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
ssp_pins: ssp-pins {
|
|
ssp1_cs {
|
|
pins = "p6_7";
|
|
function = "gpio";
|
|
bias-pull-up;
|
|
bias-disable;
|
|
};
|
|
|
|
ssp1_miso_mosi {
|
|
pins = "p1_3", "p1_4";
|
|
function = "ssp1";
|
|
slew-rate = <1>;
|
|
bias-pull-down;
|
|
input-enable;
|
|
input-schmitt-disable;
|
|
};
|
|
|
|
ssp1_sck {
|
|
pins = "pf_4";
|
|
function = "ssp1";
|
|
slew-rate = <1>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
uart2_pins: uart2-pins {
|
|
uart2_rx_cfg {
|
|
pins = "p7_2";
|
|
function = "uart2";
|
|
bias-disable;
|
|
input-enable;
|
|
};
|
|
|
|
uart2_tx_cfg {
|
|
pins = "p7_1";
|
|
function = "uart2";
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
uart3_pins: uart3-pins {
|
|
uart3_rx_cfg {
|
|
pins = "p2_4";
|
|
function = "uart3";
|
|
bias-disable;
|
|
input-enable;
|
|
};
|
|
|
|
uart3_tx_cfg {
|
|
pins = "p2_3";
|
|
function = "uart3";
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
&enet_tx_clk {
|
|
clock-frequency = <50000000>;
|
|
};
|
|
|
|
&i2c0 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c0_pins>;
|
|
clock-frequency = <400000>;
|
|
|
|
eeprom@50 {
|
|
compatible = "microchip,24c512";
|
|
reg = <0x50>;
|
|
};
|
|
|
|
eeprom@51 {
|
|
compatible = "microchip,24c02";
|
|
reg = <0x51>;
|
|
};
|
|
|
|
eeprom@54 {
|
|
compatible = "microchip,24c512";
|
|
reg = <0x54>;
|
|
};
|
|
};
|
|
|
|
&mac {
|
|
status = "okay";
|
|
phy-mode = "rmii";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&enet_rmii_pins>;
|
|
};
|
|
|
|
&sct_pwm {
|
|
status = "okay";
|
|
};
|
|
|
|
&ssp1 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&ssp_pins>;
|
|
cs-gpios = <&gpio LPC_GPIO(5,15) GPIO_ACTIVE_HIGH>;
|
|
num-cs = <1>;
|
|
};
|
|
|
|
&uart2 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart2_pins>;
|
|
};
|
|
|
|
&uart3 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart3_pins>;
|
|
};
|