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0cc0a44116
Get rid of build warnings and errors in mainline for H3 boards; not
all the H3 updates were correct, it seems like the OMAP1 boards are
not getting proper build testing.
Also, commit e27a93a944 introduced a
regression related to the tps65013 chip.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
566 lines
14 KiB
C
566 lines
14 KiB
C
/*
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* linux/arch/arm/mach-omap1/board-h3.c
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*
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* This file contains OMAP1710 H3 specific code.
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*
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* Copyright (C) 2004 Texas Instruments, Inc.
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* Copyright (C) 2002 MontaVista Software, Inc.
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* Copyright (C) 2001 RidgeRun, Inc.
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* Author: RidgeRun, Inc.
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* Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/major.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/errno.h>
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#include <linux/workqueue.h>
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#include <linux/i2c.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <linux/input.h>
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#include <linux/spi/spi.h>
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#include <linux/i2c/tps65010.h>
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#include <asm/setup.h>
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#include <asm/page.h>
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#include <asm/hardware.h>
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#include <asm/gpio.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/flash.h>
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#include <asm/mach/map.h>
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#include <asm/arch/gpioexpander.h>
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#include <asm/arch/irqs.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/tc.h>
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#include <asm/arch/nand.h>
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#include <asm/arch/irda.h>
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#include <asm/arch/usb.h>
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#include <asm/arch/keypad.h>
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#include <asm/arch/dma.h>
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#include <asm/arch/common.h>
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#include <asm/arch/mcbsp.h>
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#include <asm/arch/omap-alsa.h>
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#define H3_TS_GPIO 48
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static int h3_keymap[] = {
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KEY(0, 0, KEY_LEFT),
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KEY(0, 1, KEY_RIGHT),
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KEY(0, 2, KEY_3),
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KEY(0, 3, KEY_F10),
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KEY(0, 4, KEY_F5),
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KEY(0, 5, KEY_9),
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KEY(1, 0, KEY_DOWN),
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KEY(1, 1, KEY_UP),
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KEY(1, 2, KEY_2),
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KEY(1, 3, KEY_F9),
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KEY(1, 4, KEY_F7),
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KEY(1, 5, KEY_0),
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KEY(2, 0, KEY_ENTER),
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KEY(2, 1, KEY_6),
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KEY(2, 2, KEY_1),
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KEY(2, 3, KEY_F2),
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KEY(2, 4, KEY_F6),
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KEY(2, 5, KEY_HOME),
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KEY(3, 0, KEY_8),
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KEY(3, 1, KEY_5),
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KEY(3, 2, KEY_F12),
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KEY(3, 3, KEY_F3),
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KEY(3, 4, KEY_F8),
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KEY(3, 5, KEY_END),
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KEY(4, 0, KEY_7),
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KEY(4, 1, KEY_4),
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KEY(4, 2, KEY_F11),
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KEY(4, 3, KEY_F1),
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KEY(4, 4, KEY_F4),
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KEY(4, 5, KEY_ESC),
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KEY(5, 0, KEY_F13),
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KEY(5, 1, KEY_F14),
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KEY(5, 2, KEY_F15),
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KEY(5, 3, KEY_F16),
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KEY(5, 4, KEY_SLEEP),
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0
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};
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static struct mtd_partition nor_partitions[] = {
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/* bootloader (U-Boot, etc) in first sector */
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{
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.name = "bootloader",
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.offset = 0,
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.size = SZ_128K,
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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},
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/* bootloader params in the next sector */
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{
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.name = "params",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_128K,
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.mask_flags = 0,
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},
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/* kernel */
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{
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.name = "kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_2M,
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.mask_flags = 0
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},
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/* file system */
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{
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.name = "filesystem",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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.mask_flags = 0
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}
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};
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static struct flash_platform_data nor_data = {
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.map_name = "cfi_probe",
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.width = 2,
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.parts = nor_partitions,
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.nr_parts = ARRAY_SIZE(nor_partitions),
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};
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static struct resource nor_resource = {
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/* This is on CS3, wherever it's mapped */
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device nor_device = {
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.name = "omapflash",
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.id = 0,
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.dev = {
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.platform_data = &nor_data,
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},
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.num_resources = 1,
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.resource = &nor_resource,
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};
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static struct mtd_partition nand_partitions[] = {
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#if 0
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/* REVISIT: enable these partitions if you make NAND BOOT work */
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{
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.name = "xloader",
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.offset = 0,
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.size = 64 * 1024,
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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},
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{
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.name = "bootloader",
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.offset = MTDPART_OFS_APPEND,
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.size = 256 * 1024,
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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},
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{
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.name = "params",
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.offset = MTDPART_OFS_APPEND,
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.size = 192 * 1024,
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},
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{
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.name = "kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = 2 * SZ_1M,
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},
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#endif
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{
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.name = "filesystem",
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.size = MTDPART_SIZ_FULL,
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.offset = MTDPART_OFS_APPEND,
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},
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};
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/* dip switches control NAND chip access: 8 bit, 16 bit, or neither */
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static struct omap_nand_platform_data nand_data = {
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.options = NAND_SAMSUNG_LP_OPTIONS,
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.parts = nand_partitions,
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.nr_parts = ARRAY_SIZE(nand_partitions),
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};
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static struct resource nand_resource = {
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device nand_device = {
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.name = "omapnand",
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.id = 0,
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.dev = {
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.platform_data = &nand_data,
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},
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.num_resources = 1,
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.resource = &nand_resource,
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};
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static struct resource smc91x_resources[] = {
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[0] = {
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.start = OMAP1710_ETHR_START, /* Physical */
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.end = OMAP1710_ETHR_START + 0xf,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = OMAP_GPIO_IRQ(40),
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.end = OMAP_GPIO_IRQ(40),
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
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},
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};
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static struct platform_device smc91x_device = {
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.name = "smc91x",
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.id = 0,
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.num_resources = ARRAY_SIZE(smc91x_resources),
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.resource = smc91x_resources,
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};
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#define GPTIMER_BASE 0xFFFB1400
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#define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
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#define GPTIMER_REGS_SIZE 0x46
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static struct resource intlat_resources[] = {
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[0] = {
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.start = GPTIMER_REGS(0), /* Physical */
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.end = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = INT_1610_GPTIMER1,
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.end = INT_1610_GPTIMER1,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device intlat_device = {
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.name = "omap_intlat",
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.id = 0,
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.num_resources = ARRAY_SIZE(intlat_resources),
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.resource = intlat_resources,
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};
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static struct resource h3_kp_resources[] = {
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[0] = {
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.start = INT_KEYBOARD,
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.end = INT_KEYBOARD,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct omap_kp_platform_data h3_kp_data = {
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.rows = 8,
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.cols = 8,
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.keymap = h3_keymap,
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.keymapsize = ARRAY_SIZE(h3_keymap),
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.rep = 1,
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.delay = 9,
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.dbounce = 1,
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};
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static struct platform_device h3_kp_device = {
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.name = "omap-keypad",
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.id = -1,
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.dev = {
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.platform_data = &h3_kp_data,
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},
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.num_resources = ARRAY_SIZE(h3_kp_resources),
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.resource = h3_kp_resources,
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};
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/* Select between the IrDA and aGPS module
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*/
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static int h3_select_irda(struct device *dev, int state)
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{
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unsigned char expa;
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int err = 0;
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if ((err = read_gpio_expa(&expa, 0x26))) {
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printk(KERN_ERR "Error reading from I/O EXPANDER \n");
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return err;
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}
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/* 'P6' enable/disable IRDA_TX and IRDA_RX */
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if (state & IR_SEL) { /* IrDA */
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if ((err = write_gpio_expa(expa | 0x40, 0x26))) {
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printk(KERN_ERR "Error writing to I/O EXPANDER \n");
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return err;
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}
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} else {
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if ((err = write_gpio_expa(expa & ~0x40, 0x26))) {
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printk(KERN_ERR "Error writing to I/O EXPANDER \n");
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return err;
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}
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}
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return err;
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}
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static void set_trans_mode(struct work_struct *work)
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{
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struct omap_irda_config *irda_config =
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container_of(work, struct omap_irda_config, gpio_expa.work);
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int mode = irda_config->mode;
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unsigned char expa;
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int err = 0;
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if ((err = read_gpio_expa(&expa, 0x27)) != 0) {
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printk(KERN_ERR "Error reading from I/O expander\n");
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}
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expa &= ~0x03;
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if (mode & IR_SIRMODE) {
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expa |= 0x01;
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} else { /* MIR/FIR */
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expa |= 0x03;
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}
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if ((err = write_gpio_expa(expa, 0x27)) != 0) {
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printk(KERN_ERR "Error writing to I/O expander\n");
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}
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}
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static int h3_transceiver_mode(struct device *dev, int mode)
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{
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struct omap_irda_config *irda_config = dev->platform_data;
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irda_config->mode = mode;
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cancel_delayed_work(&irda_config->gpio_expa);
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PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode);
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schedule_delayed_work(&irda_config->gpio_expa, 0);
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return 0;
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}
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static struct omap_irda_config h3_irda_data = {
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.transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
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.transceiver_mode = h3_transceiver_mode,
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.select_irda = h3_select_irda,
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.rx_channel = OMAP_DMA_UART3_RX,
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.tx_channel = OMAP_DMA_UART3_TX,
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.dest_start = UART3_THR,
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.src_start = UART3_RHR,
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.tx_trigger = 0,
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.rx_trigger = 0,
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};
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static struct resource h3_irda_resources[] = {
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[0] = {
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.start = INT_UART3,
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.end = INT_UART3,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 irda_dmamask = 0xffffffff;
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static struct platform_device h3_irda_device = {
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.name = "omapirda",
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.id = 0,
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.dev = {
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.platform_data = &h3_irda_data,
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.dma_mask = &irda_dmamask,
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},
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.num_resources = ARRAY_SIZE(h3_irda_resources),
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.resource = h3_irda_resources,
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};
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static struct platform_device h3_lcd_device = {
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.name = "lcd_h3",
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.id = -1,
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};
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static struct spi_board_info h3_spi_board_info[] __initdata = {
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[0] = {
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.modalias = "tsc2101",
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.bus_num = 2,
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.chip_select = 0,
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.irq = OMAP_GPIO_IRQ(H3_TS_GPIO),
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.max_speed_hz = 16000000,
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/* .platform_data = &tsc_platform_data, */
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},
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};
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static struct omap_mcbsp_reg_cfg mcbsp_regs = {
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.spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
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.spcr1 = RINTM(3) | RRST,
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.rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) |
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RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(1),
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.rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16),
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.xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) |
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XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(1) | XFIG,
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.xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16),
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.srgr1 = FWID(15),
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.srgr2 = GSYNC | CLKSP | FSGM | FPER(31),
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.pcr0 = CLKRM | SCLKME | FSXP | FSRP | CLKXP | CLKRP,
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/*.pcr0 = CLKXP | CLKRP,*/ /* mcbsp: slave */
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};
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static struct omap_alsa_codec_config alsa_config = {
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.name = "H3 TSC2101",
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.mcbsp_regs_alsa = &mcbsp_regs,
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.codec_configure_dev = NULL, /* tsc2101_configure, */
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.codec_set_samplerate = NULL, /* tsc2101_set_samplerate, */
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.codec_clock_setup = NULL, /* tsc2101_clock_setup, */
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.codec_clock_on = NULL, /* tsc2101_clock_on, */
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.codec_clock_off = NULL, /* tsc2101_clock_off, */
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.get_default_samplerate = NULL, /* tsc2101_get_default_samplerate, */
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};
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static struct platform_device h3_mcbsp1_device = {
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.name = "omap_alsa_mcbsp",
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.id = 1,
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.dev = {
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.platform_data = &alsa_config,
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},
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};
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static struct platform_device *devices[] __initdata = {
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&nor_device,
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&nand_device,
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&smc91x_device,
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&intlat_device,
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&h3_irda_device,
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&h3_kp_device,
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&h3_lcd_device,
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&h3_mcbsp1_device,
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};
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static struct omap_usb_config h3_usb_config __initdata = {
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/* usb1 has a Mini-AB port and external isp1301 transceiver */
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.otg = 2,
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#ifdef CONFIG_USB_GADGET_OMAP
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.hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */
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#elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
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/* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
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.hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */
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#endif
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.pins[1] = 3,
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};
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static struct omap_mmc_config h3_mmc_config __initdata = {
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.mmc[0] = {
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.enabled = 1,
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.wire4 = 1,
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},
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};
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extern struct omap_mmc_platform_data h3_mmc_data;
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static struct omap_uart_config h3_uart_config __initdata = {
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.enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
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};
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static struct omap_lcd_config h3_lcd_config __initdata = {
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.ctrl_name = "internal",
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};
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static struct omap_board_config_kernel h3_config[] __initdata = {
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{ OMAP_TAG_USB, &h3_usb_config },
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{ OMAP_TAG_MMC, &h3_mmc_config },
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{ OMAP_TAG_UART, &h3_uart_config },
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{ OMAP_TAG_LCD, &h3_lcd_config },
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};
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static struct i2c_board_info __initdata h3_i2c_board_info[] = {
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{
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I2C_BOARD_INFO("tps65010", 0x48),
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.type = "tps65013",
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/* .irq = OMAP_GPIO_IRQ(??), */
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},
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};
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static struct omap_gpio_switch h3_gpio_switches[] __initdata = {
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{
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.name = "mmc_slot",
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|
.gpio = OMAP_MPUIO(1),
|
|
.type = OMAP_GPIO_SWITCH_TYPE_COVER,
|
|
.debounce_rising = 100,
|
|
.debounce_falling = 0,
|
|
.notify = h3_mmc_slot_cover_handler,
|
|
.notify_data = NULL,
|
|
},
|
|
};
|
|
|
|
#define H3_NAND_RB_GPIO_PIN 10
|
|
|
|
static int nand_dev_ready(struct omap_nand_platform_data *data)
|
|
{
|
|
return omap_get_gpio_datain(H3_NAND_RB_GPIO_PIN);
|
|
}
|
|
|
|
static void __init h3_init(void)
|
|
{
|
|
/* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
|
|
* to address 0 by a dip switch), NAND on CS2B. The NAND driver will
|
|
* notice whether a NAND chip is enabled at probe time.
|
|
*
|
|
* H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
|
|
* (which on H2 may be 16bit) on CS3. Try detecting that in code here,
|
|
* to avoid probing every possible flash configuration...
|
|
*/
|
|
nor_resource.end = nor_resource.start = omap_cs3_phys();
|
|
nor_resource.end += SZ_32M - 1;
|
|
|
|
nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
|
|
nand_resource.end += SZ_4K - 1;
|
|
if (!(omap_request_gpio(H3_NAND_RB_GPIO_PIN)))
|
|
nand_data.dev_ready = nand_dev_ready;
|
|
|
|
/* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
|
|
/* GPIO10 pullup/down register, Enable pullup on GPIO10 */
|
|
omap_cfg_reg(V2_1710_GPIO10);
|
|
|
|
platform_add_devices(devices, ARRAY_SIZE(devices));
|
|
spi_register_board_info(h3_spi_board_info,
|
|
ARRAY_SIZE(h3_spi_board_info));
|
|
omap_board_config = h3_config;
|
|
omap_board_config_size = ARRAY_SIZE(h3_config);
|
|
omap_serial_init();
|
|
omap_register_i2c_bus(1, 100, h3_i2c_board_info,
|
|
ARRAY_SIZE(h3_i2c_board_info));
|
|
h3_mmc_init();
|
|
}
|
|
|
|
static void __init h3_init_smc91x(void)
|
|
{
|
|
omap_cfg_reg(W15_1710_GPIO40);
|
|
if (omap_request_gpio(40) < 0) {
|
|
printk("Error requesting gpio 40 for smc91x irq\n");
|
|
return;
|
|
}
|
|
}
|
|
|
|
static void __init h3_init_irq(void)
|
|
{
|
|
omap1_init_common_hw();
|
|
omap_init_irq();
|
|
omap_gpio_init();
|
|
h3_init_smc91x();
|
|
}
|
|
|
|
static void __init h3_map_io(void)
|
|
{
|
|
omap1_map_common_io();
|
|
}
|
|
|
|
MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
|
|
/* Maintainer: Texas Instruments, Inc. */
|
|
.phys_io = 0xfff00000,
|
|
.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
|
|
.boot_params = 0x10000100,
|
|
.map_io = h3_map_io,
|
|
.init_irq = h3_init_irq,
|
|
.init_machine = h3_init,
|
|
.timer = &omap_timer,
|
|
MACHINE_END
|