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This isn't per-se a real device, it's a pseudo-device that represents the use of the Aspeed built-in ColdFire to implement the FSI protocol by bitbanging the GPIOs instead of doing it from the ARM core. Thus it's a drop-in replacement for the existing fsi-master-gpio pseudo-device for use on systems based on the Aspeed chips. It has most of the same properties, plus some more needed to operate the coprocessor. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Rob Herring <robh@kernel.org>
37 lines
1.3 KiB
Plaintext
37 lines
1.3 KiB
Plaintext
Device-tree bindings for ColdFire offloaded gpio-based FSI master driver
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------------------------------------------------------------------------
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Required properties:
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- compatible =
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"aspeed,ast2400-cf-fsi-master" for an AST2400 based system
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or
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"aspeed,ast2500-cf-fsi-master" for an AST2500 based system
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- clock-gpios = <gpio-descriptor>; : GPIO for FSI clock
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- data-gpios = <gpio-descriptor>; : GPIO for FSI data signal
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- enable-gpios = <gpio-descriptor>; : GPIO for enable signal
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- trans-gpios = <gpio-descriptor>; : GPIO for voltage translator enable
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- mux-gpios = <gpio-descriptor>; : GPIO for pin multiplexing with other
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functions (eg, external FSI masters)
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- memory-region = <phandle>; : Reference to the reserved memory for
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the ColdFire. Must be 2M aligned on
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AST2400 and 1M aligned on AST2500
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- aspeed,sram = <phandle>; : Reference to the SRAM node.
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- aspeed,cvic = <phandle>; : Reference to the CVIC node.
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Examples:
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fsi-master {
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compatible = "aspeed,ast2500-cf-fsi-master", "fsi-master";
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clock-gpios = <&gpio 0>;
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data-gpios = <&gpio 1>;
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enable-gpios = <&gpio 2>;
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trans-gpios = <&gpio 3>;
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mux-gpios = <&gpio 4>;
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memory-region = <&coldfire_memory>;
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aspeed,sram = <&sram>;
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aspeed,cvic = <&cvic>;
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}
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