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296d05cb0d
A few minor RISC-V updates for v5.3-rc4: - Remove __udivdi3() from the 32-bit Linux port, converting the only upstream user to use do_div(), per Linux policy - Convert the RISC-V standard clocksource away from per-cpu data structures, since only one is used by Linux, even on a multi-CPU system - A set of DT binding updates that remove an obsolete text binding in favor of a YAML binding, fix a bogus compatible string in the schema (thus fixing a "make dtbs_check" warning), and clarifies the future values expected in one of the RISC-V CPU properties -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEElRDoIDdEz9/svf2Kx4+xDQu9KksFAl1PO50ACgkQx4+xDQu9 Kks+aA//d2HVbYpsQT4dnK9HHySTEN8COpxAtXEyprqEqFvhGWiXHf/o5DZJS+KA J0T4tnfajUxNzN+/B+Wvg8QRZyojad1gPQ8WpKGsRjVMtSZJuvo/knW1aVJPFr5S 28AjXyR5XVugvt5mNSNJTrPBeJ/bzNSZOLfat+gCsHBblNipdWwZhOwcM4mi3sQM 9fc8R5Mg0LHwNF0yVoA47WEwWgjXINkOE5ntvgNydiwoTc4noB046gy0ciZF04WS YZMNRmr3BCL30zGZv6Ewu7xvcRYf84wjhIvPFkuaJHfxBzwAd4gulsytqGCQmFIC Na7/5HOtzXpsS27hSev+1SGljv81p3rlKIBVxB2E1OH/eDl1U+yhm/AtM0wbXkpD 2UMHmKoSL/oYIXKOXwpWSKTGxNJbF1c56q4lwDVjq/kvg88GhFXQV/cQV1pS2Aao KkqKl8AfxzoG3KNGKNJD42ztMW+3a3Wp215pGbrVVAwVOD8kFgCiM9RtqH2pTZrA AjD/wpAaH9glGkCcwPovzOJ1XA9VKLy4nWLowv5zB9To1wbbAuYRj/7pUNm6LTWF kcU0E6Yza5b2kKvwSzLdZa4W837XQrf3fRKMTTgH+fcjwma+GlLwx+f6Yk8AmTpP TMSpV9C6M5RKLVqdzNWUT7q4dzTsNPXse5DhhhnMh3cBPHIGlzQ= =DIhv -----END PGP SIGNATURE----- Merge tag 'riscv/for-v5.3-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V updates from Paul Walmsley: "A few minor RISC-V updates for v5.3-rc4: - Remove __udivdi3() from the 32-bit Linux port, converting the only upstream user to use do_div(), per Linux policy - Convert the RISC-V standard clocksource away from per-cpu data structures, since only one is used by Linux, even on a multi-CPU system - A set of DT binding updates that remove an obsolete text binding in favor of a YAML binding, fix a bogus compatible string in the schema (thus fixing a "make dtbs_check" warning), and clarifies the future values expected in one of the RISC-V CPU properties" * tag 'riscv/for-v5.3-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: dt-bindings: riscv: fix the schema compatible string for the HiFive Unleashed board dt-bindings: riscv: remove obsolete cpus.txt RISC-V: Remove udivdi3 riscv: delay: use do_div() instead of __udivdi3() dt-bindings: Update the riscv,isa string description RISC-V: Remove per cpu clocksource |
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.. | ||
arc | ||
arm | ||
ata | ||
auxdisplay | ||
board | ||
bus | ||
c6x | ||
clock | ||
connector | ||
counter | ||
cpufreq | ||
crypto | ||
csky | ||
devfreq | ||
display | ||
dma | ||
edac | ||
eeprom | ||
extcon | ||
fieldbus | ||
firmware | ||
fpga | ||
fsi | ||
fuse | ||
gnss | ||
goldfish | ||
gpio | ||
gpu | ||
h8300 | ||
hsi | ||
hwlock | ||
hwmon | ||
i2c | ||
i3c | ||
iio | ||
infiniband | ||
input | ||
interconnect | ||
interrupt-controller | ||
iommu | ||
ipmi | ||
leds | ||
lpddr2 | ||
mailbox | ||
media | ||
memory-controllers | ||
mfd | ||
mips | ||
misc | ||
mmc | ||
mtd | ||
mux | ||
nds32 | ||
net | ||
nios2 | ||
nvmem | ||
openrisc/opencores | ||
opp | ||
pci | ||
perf | ||
phy | ||
pinctrl | ||
pmem | ||
power | ||
powerpc | ||
pps | ||
ptp | ||
pwm | ||
regmap | ||
regulator | ||
remoteproc | ||
reserved-memory | ||
reset | ||
riscv | ||
rng | ||
rtc | ||
scsi | ||
security/tpm | ||
serial | ||
serio | ||
sifive | ||
siox | ||
slimbus | ||
soc | ||
sound | ||
spi | ||
spmi | ||
sram | ||
staging/iio/adc | ||
thermal | ||
timer | ||
ufs | ||
usb | ||
virtio | ||
w1 | ||
watchdog | ||
x86 | ||
xillybus | ||
.gitignore | ||
ABI.txt | ||
chosen.txt | ||
common-properties.txt | ||
example-schema.yaml | ||
graph.txt | ||
jailhouse.txt | ||
Makefile | ||
numa.txt | ||
property-units.txt | ||
resource-names.txt | ||
submitting-patches.txt | ||
trivial-devices.yaml | ||
unittest.txt | ||
vendor-prefixes.yaml | ||
writing-bindings.txt | ||
xilinx.txt |