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a32a3c800c
The plane reset handler frees the plane state and allocates a new default state, but when doing so attempt to free the plane state using the base plane state pointer instead of casting it to the driver-specific state object that has been allocated. Fix it by using the rcar_du_plane_atomic_destroy_state() function to destroy the plane state instead of duplicating the code. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Thierry Reding <treding@nvidia.com>
434 lines
12 KiB
C
434 lines
12 KiB
C
/*
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* rcar_du_plane.c -- R-Car Display Unit Planes
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*
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* Copyright (C) 2013-2014 Renesas Electronics Corporation
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*
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* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <drm/drmP.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_fb_cma_helper.h>
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#include <drm/drm_gem_cma_helper.h>
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#include <drm/drm_plane_helper.h>
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#include "rcar_du_drv.h"
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#include "rcar_du_kms.h"
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#include "rcar_du_plane.h"
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#include "rcar_du_regs.h"
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#define RCAR_DU_COLORKEY_NONE (0 << 24)
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#define RCAR_DU_COLORKEY_SOURCE (1 << 24)
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#define RCAR_DU_COLORKEY_MASK (1 << 24)
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static u32 rcar_du_plane_read(struct rcar_du_group *rgrp,
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unsigned int index, u32 reg)
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{
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return rcar_du_read(rgrp->dev,
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rgrp->mmio_offset + index * PLANE_OFF + reg);
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}
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static void rcar_du_plane_write(struct rcar_du_group *rgrp,
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unsigned int index, u32 reg, u32 data)
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{
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rcar_du_write(rgrp->dev, rgrp->mmio_offset + index * PLANE_OFF + reg,
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data);
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}
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static void rcar_du_plane_setup_fb(struct rcar_du_plane *plane)
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{
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struct rcar_du_plane_state *state =
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to_rcar_plane_state(plane->plane.state);
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struct drm_framebuffer *fb = plane->plane.state->fb;
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struct rcar_du_group *rgrp = plane->group;
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unsigned int src_x = state->state.src_x >> 16;
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unsigned int src_y = state->state.src_y >> 16;
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unsigned int index = state->hwindex;
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struct drm_gem_cma_object *gem;
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bool interlaced;
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u32 mwr;
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interlaced = state->state.crtc->state->adjusted_mode.flags
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& DRM_MODE_FLAG_INTERLACE;
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/* Memory pitch (expressed in pixels). Must be doubled for interlaced
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* operation with 32bpp formats.
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*/
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if (state->format->planes == 2)
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mwr = fb->pitches[0];
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else
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mwr = fb->pitches[0] * 8 / state->format->bpp;
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if (interlaced && state->format->bpp == 32)
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mwr *= 2;
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rcar_du_plane_write(rgrp, index, PnMWR, mwr);
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/* The Y position is expressed in raster line units and must be doubled
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* for 32bpp formats, according to the R8A7790 datasheet. No mention of
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* doubling the Y position is found in the R8A7779 datasheet, but the
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* rule seems to apply there as well.
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*
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* Despite not being documented, doubling seem not to be needed when
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* operating in interlaced mode.
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*
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* Similarly, for the second plane, NV12 and NV21 formats seem to
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* require a halved Y position value, in both progressive and interlaced
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* modes.
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*/
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rcar_du_plane_write(rgrp, index, PnSPXR, src_x);
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rcar_du_plane_write(rgrp, index, PnSPYR, src_y *
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(!interlaced && state->format->bpp == 32 ? 2 : 1));
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gem = drm_fb_cma_get_gem_obj(fb, 0);
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rcar_du_plane_write(rgrp, index, PnDSA0R, gem->paddr + fb->offsets[0]);
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if (state->format->planes == 2) {
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index = (index + 1) % 8;
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rcar_du_plane_write(rgrp, index, PnMWR, fb->pitches[0]);
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rcar_du_plane_write(rgrp, index, PnSPXR, src_x);
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rcar_du_plane_write(rgrp, index, PnSPYR, src_y *
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(state->format->bpp == 16 ? 2 : 1) / 2);
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gem = drm_fb_cma_get_gem_obj(fb, 1);
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rcar_du_plane_write(rgrp, index, PnDSA0R,
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gem->paddr + fb->offsets[1]);
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}
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}
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static void rcar_du_plane_setup_mode(struct rcar_du_plane *plane,
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unsigned int index)
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{
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struct rcar_du_plane_state *state =
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to_rcar_plane_state(plane->plane.state);
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struct rcar_du_group *rgrp = plane->group;
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u32 colorkey;
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u32 pnmr;
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/* The PnALPHAR register controls alpha-blending in 16bpp formats
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* (ARGB1555 and XRGB1555).
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*
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* For ARGB, set the alpha value to 0, and enable alpha-blending when
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* the A bit is 0. This maps A=0 to alpha=0 and A=1 to alpha=255.
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*
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* For XRGB, set the alpha value to the plane-wide alpha value and
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* enable alpha-blending regardless of the X bit value.
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*/
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if (state->format->fourcc != DRM_FORMAT_XRGB1555)
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rcar_du_plane_write(rgrp, index, PnALPHAR, PnALPHAR_ABIT_0);
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else
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rcar_du_plane_write(rgrp, index, PnALPHAR,
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PnALPHAR_ABIT_X | state->alpha);
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pnmr = PnMR_BM_MD | state->format->pnmr;
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/* Disable color keying when requested. YUV formats have the
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* PnMR_SPIM_TP_OFF bit set in their pnmr field, disabling color keying
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* automatically.
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*/
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if ((state->colorkey & RCAR_DU_COLORKEY_MASK) == RCAR_DU_COLORKEY_NONE)
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pnmr |= PnMR_SPIM_TP_OFF;
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/* For packed YUV formats we need to select the U/V order. */
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if (state->format->fourcc == DRM_FORMAT_YUYV)
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pnmr |= PnMR_YCDF_YUYV;
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rcar_du_plane_write(rgrp, index, PnMR, pnmr);
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switch (state->format->fourcc) {
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case DRM_FORMAT_RGB565:
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colorkey = ((state->colorkey & 0xf80000) >> 8)
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| ((state->colorkey & 0x00fc00) >> 5)
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| ((state->colorkey & 0x0000f8) >> 3);
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rcar_du_plane_write(rgrp, index, PnTC2R, colorkey);
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break;
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case DRM_FORMAT_ARGB1555:
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case DRM_FORMAT_XRGB1555:
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colorkey = ((state->colorkey & 0xf80000) >> 9)
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| ((state->colorkey & 0x00f800) >> 6)
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| ((state->colorkey & 0x0000f8) >> 3);
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rcar_du_plane_write(rgrp, index, PnTC2R, colorkey);
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break;
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case DRM_FORMAT_XRGB8888:
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case DRM_FORMAT_ARGB8888:
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rcar_du_plane_write(rgrp, index, PnTC3R,
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PnTC3R_CODE | (state->colorkey & 0xffffff));
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break;
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}
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}
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static void __rcar_du_plane_setup(struct rcar_du_plane *plane,
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unsigned int index)
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{
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struct rcar_du_plane_state *state =
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to_rcar_plane_state(plane->plane.state);
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struct rcar_du_group *rgrp = plane->group;
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u32 ddcr2 = PnDDCR2_CODE;
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u32 ddcr4;
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/* Data format
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*
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* The data format is selected by the DDDF field in PnMR and the EDF
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* field in DDCR4.
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*/
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ddcr4 = rcar_du_plane_read(rgrp, index, PnDDCR4);
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ddcr4 &= ~PnDDCR4_EDF_MASK;
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ddcr4 |= state->format->edf | PnDDCR4_CODE;
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rcar_du_plane_setup_mode(plane, index);
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if (state->format->planes == 2) {
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if (state->hwindex != index) {
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if (state->format->fourcc == DRM_FORMAT_NV12 ||
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state->format->fourcc == DRM_FORMAT_NV21)
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ddcr2 |= PnDDCR2_Y420;
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if (state->format->fourcc == DRM_FORMAT_NV21)
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ddcr2 |= PnDDCR2_NV21;
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ddcr2 |= PnDDCR2_DIVU;
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} else {
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ddcr2 |= PnDDCR2_DIVY;
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}
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}
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rcar_du_plane_write(rgrp, index, PnDDCR2, ddcr2);
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rcar_du_plane_write(rgrp, index, PnDDCR4, ddcr4);
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/* Destination position and size */
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rcar_du_plane_write(rgrp, index, PnDSXR, plane->plane.state->crtc_w);
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rcar_du_plane_write(rgrp, index, PnDSYR, plane->plane.state->crtc_h);
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rcar_du_plane_write(rgrp, index, PnDPXR, plane->plane.state->crtc_x);
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rcar_du_plane_write(rgrp, index, PnDPYR, plane->plane.state->crtc_y);
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/* Wrap-around and blinking, disabled */
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rcar_du_plane_write(rgrp, index, PnWASPR, 0);
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rcar_du_plane_write(rgrp, index, PnWAMWR, 4095);
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rcar_du_plane_write(rgrp, index, PnBTR, 0);
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rcar_du_plane_write(rgrp, index, PnMLR, 0);
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}
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void rcar_du_plane_setup(struct rcar_du_plane *plane)
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{
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struct rcar_du_plane_state *state =
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to_rcar_plane_state(plane->plane.state);
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__rcar_du_plane_setup(plane, state->hwindex);
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if (state->format->planes == 2)
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__rcar_du_plane_setup(plane, (state->hwindex + 1) % 8);
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rcar_du_plane_setup_fb(plane);
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}
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static int rcar_du_plane_atomic_check(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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struct rcar_du_plane_state *rstate = to_rcar_plane_state(state);
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struct rcar_du_plane *rplane = to_rcar_plane(plane);
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struct rcar_du_device *rcdu = rplane->group->dev;
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if (!state->fb || !state->crtc) {
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rstate->format = NULL;
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return 0;
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}
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if (state->src_w >> 16 != state->crtc_w ||
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state->src_h >> 16 != state->crtc_h) {
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dev_dbg(rcdu->dev, "%s: scaling not supported\n", __func__);
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return -EINVAL;
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}
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rstate->format = rcar_du_format_info(state->fb->pixel_format);
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if (rstate->format == NULL) {
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dev_dbg(rcdu->dev, "%s: unsupported format %08x\n", __func__,
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state->fb->pixel_format);
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return -EINVAL;
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}
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return 0;
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}
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static void rcar_du_plane_atomic_update(struct drm_plane *plane,
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struct drm_plane_state *old_state)
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{
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struct rcar_du_plane *rplane = to_rcar_plane(plane);
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if (plane->state->crtc)
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rcar_du_plane_setup(rplane);
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}
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static const struct drm_plane_helper_funcs rcar_du_plane_helper_funcs = {
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.atomic_check = rcar_du_plane_atomic_check,
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.atomic_update = rcar_du_plane_atomic_update,
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};
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static struct drm_plane_state *
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rcar_du_plane_atomic_duplicate_state(struct drm_plane *plane)
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{
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struct rcar_du_plane_state *state;
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struct rcar_du_plane_state *copy;
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if (WARN_ON(!plane->state))
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return NULL;
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state = to_rcar_plane_state(plane->state);
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copy = kmemdup(state, sizeof(*state), GFP_KERNEL);
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if (copy == NULL)
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return NULL;
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__drm_atomic_helper_plane_duplicate_state(plane, ©->state);
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return ©->state;
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}
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static void rcar_du_plane_atomic_destroy_state(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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__drm_atomic_helper_plane_destroy_state(plane, state);
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kfree(to_rcar_plane_state(state));
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}
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static void rcar_du_plane_reset(struct drm_plane *plane)
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{
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struct rcar_du_plane_state *state;
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if (plane->state) {
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rcar_du_plane_atomic_destroy_state(plane, plane->state);
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plane->state = NULL;
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}
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state = kzalloc(sizeof(*state), GFP_KERNEL);
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if (state == NULL)
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return;
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state->hwindex = -1;
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state->alpha = 255;
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state->colorkey = RCAR_DU_COLORKEY_NONE;
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state->zpos = plane->type == DRM_PLANE_TYPE_PRIMARY ? 0 : 1;
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plane->state = &state->state;
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plane->state->plane = plane;
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}
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static int rcar_du_plane_atomic_set_property(struct drm_plane *plane,
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struct drm_plane_state *state,
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struct drm_property *property,
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uint64_t val)
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{
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struct rcar_du_plane_state *rstate = to_rcar_plane_state(state);
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struct rcar_du_device *rcdu = to_rcar_plane(plane)->group->dev;
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if (property == rcdu->props.alpha)
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rstate->alpha = val;
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else if (property == rcdu->props.colorkey)
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rstate->colorkey = val;
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else if (property == rcdu->props.zpos)
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rstate->zpos = val;
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else
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return -EINVAL;
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return 0;
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}
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static int rcar_du_plane_atomic_get_property(struct drm_plane *plane,
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const struct drm_plane_state *state, struct drm_property *property,
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uint64_t *val)
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{
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const struct rcar_du_plane_state *rstate =
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container_of(state, const struct rcar_du_plane_state, state);
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struct rcar_du_device *rcdu = to_rcar_plane(plane)->group->dev;
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if (property == rcdu->props.alpha)
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*val = rstate->alpha;
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else if (property == rcdu->props.colorkey)
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*val = rstate->colorkey;
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else if (property == rcdu->props.zpos)
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*val = rstate->zpos;
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else
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return -EINVAL;
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return 0;
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}
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static const struct drm_plane_funcs rcar_du_plane_funcs = {
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.update_plane = drm_atomic_helper_update_plane,
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.disable_plane = drm_atomic_helper_disable_plane,
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.reset = rcar_du_plane_reset,
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.set_property = drm_atomic_helper_plane_set_property,
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.destroy = drm_plane_cleanup,
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.atomic_duplicate_state = rcar_du_plane_atomic_duplicate_state,
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.atomic_destroy_state = rcar_du_plane_atomic_destroy_state,
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.atomic_set_property = rcar_du_plane_atomic_set_property,
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.atomic_get_property = rcar_du_plane_atomic_get_property,
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};
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static const uint32_t formats[] = {
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DRM_FORMAT_RGB565,
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DRM_FORMAT_ARGB1555,
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DRM_FORMAT_XRGB1555,
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DRM_FORMAT_XRGB8888,
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DRM_FORMAT_ARGB8888,
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DRM_FORMAT_UYVY,
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DRM_FORMAT_YUYV,
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DRM_FORMAT_NV12,
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DRM_FORMAT_NV21,
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DRM_FORMAT_NV16,
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};
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int rcar_du_planes_init(struct rcar_du_group *rgrp)
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{
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struct rcar_du_device *rcdu = rgrp->dev;
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unsigned int crtcs;
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unsigned int i;
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int ret;
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/* Create one primary plane per CRTC in this group and seven overlay
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* planes.
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*/
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rgrp->num_planes = rgrp->num_crtcs + 7;
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crtcs = ((1 << rcdu->num_crtcs) - 1) & (3 << (2 * rgrp->index));
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for (i = 0; i < rgrp->num_planes; ++i) {
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enum drm_plane_type type = i < rgrp->num_crtcs
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? DRM_PLANE_TYPE_PRIMARY
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: DRM_PLANE_TYPE_OVERLAY;
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struct rcar_du_plane *plane = &rgrp->planes[i];
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plane->group = rgrp;
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ret = drm_universal_plane_init(rcdu->ddev, &plane->plane, crtcs,
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&rcar_du_plane_funcs, formats,
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ARRAY_SIZE(formats), type);
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if (ret < 0)
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return ret;
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drm_plane_helper_add(&plane->plane,
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&rcar_du_plane_helper_funcs);
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if (type == DRM_PLANE_TYPE_PRIMARY)
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continue;
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drm_object_attach_property(&plane->plane.base,
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rcdu->props.alpha, 255);
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drm_object_attach_property(&plane->plane.base,
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rcdu->props.colorkey,
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RCAR_DU_COLORKEY_NONE);
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drm_object_attach_property(&plane->plane.base,
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rcdu->props.zpos, 1);
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}
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return 0;
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}
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