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Each CPU can (and does) participate in cooling down the system but the DT only captures a handful of them, normally CPU0, in the cooling maps. Things work by chance currently as under normal circumstances its the first CPU of each cluster which is used by the operating systems to probe the cooling devices. But as soon as this CPU ordering changes and any other CPU is used to bring up the cooling device, we will start seeing failures. Also the DT is rather incomplete when we list only one CPU in the cooling maps, as the hardware doesn't have any such limitations. Update cooling maps to include all devices affected by individual trip points. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
218 lines
5.2 KiB
Plaintext
218 lines
5.2 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Google Veyron Mickey Rev 0 board device tree source
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*
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* Copyright 2015 Google, Inc
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*/
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/dts-v1/;
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#include "rk3288-veyron.dtsi"
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/ {
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model = "Google Mickey";
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compatible = "google,veyron-mickey-rev8", "google,veyron-mickey-rev7",
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"google,veyron-mickey-rev6", "google,veyron-mickey-rev5",
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"google,veyron-mickey-rev4", "google,veyron-mickey-rev3",
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"google,veyron-mickey-rev2", "google,veyron-mickey-rev1",
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"google,veyron-mickey-rev0", "google,veyron-mickey",
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"google,veyron", "rockchip,rk3288";
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vcc_5v: vcc-5v {
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vin-supply = <&vcc33_sys>;
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};
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vcc33_io: vcc33_io {
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compatible = "regulator-fixed";
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regulator-name = "vcc33_io";
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&vcc33_sys>;
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};
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};
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&cpu_thermal {
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/delete-node/ trips;
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/delete-node/ cooling-maps;
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trips {
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cpu_alert_almost_warm: cpu_alert_almost_warm {
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temperature = <63000>; /* millicelsius */
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hysteresis = <2000>; /* millicelsius */
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type = "passive";
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};
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cpu_alert_warm: cpu_alert_warm {
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temperature = <65000>; /* millicelsius */
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hysteresis = <2000>; /* millicelsius */
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type = "passive";
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};
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cpu_alert_almost_hot: cpu_alert_almost_hot {
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temperature = <80000>; /* millicelsius */
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hysteresis = <2000>; /* millicelsius */
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type = "passive";
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};
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cpu_alert_hot: cpu_alert_hot {
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temperature = <82000>; /* millicelsius */
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hysteresis = <2000>; /* millicelsius */
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type = "passive";
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};
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cpu_alert_hotter: cpu_alert_hotter {
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temperature = <84000>; /* millicelsius */
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hysteresis = <2000>; /* millicelsius */
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type = "passive";
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};
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cpu_alert_very_hot: cpu_alert_very_hot {
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temperature = <85000>; /* millicelsius */
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hysteresis = <2000>; /* millicelsius */
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type = "passive";
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};
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cpu_crit: cpu_crit {
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temperature = <90000>; /* millicelsius */
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hysteresis = <2000>; /* millicelsius */
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type = "critical";
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};
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};
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cooling-maps {
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/*
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* After 1st level, throttle the CPU down to as low as 1.4 GHz
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* and don't let the GPU go faster than 400 MHz. Note that we
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* won't throttle the GPU lower than 400 MHz due to CPU
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* heat--we'll let the GPU do the rest itself.
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*/
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cpu_warm_limit_cpu {
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trip = <&cpu_alert_warm>;
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cooling-device = <&cpu0 THERMAL_NO_LIMIT 4>,
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<&cpu1 THERMAL_NO_LIMIT 4>,
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<&cpu2 THERMAL_NO_LIMIT 4>,
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<&cpu3 THERMAL_NO_LIMIT 4>;
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};
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/*
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* Add some discrete steps to help throttling system deal
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* with the fact that there are two passive cooling devices:
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* the CPU and the GPU.
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*
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* - 1.2 GHz - 1.0 GHz (almost hot)
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* - 800 MHz (hot)
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* - 800 MHz - 696 MHz (hotter)
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* - 696 MHz - min (very hot)
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*
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* Note:
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* - 800 MHz appears to be a "sweet spot" for me. I can run
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* some pretty serious workload here and be happy.
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* - After 696 MHz we stop lowering voltage, so throttling
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* past there is less effective.
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*/
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cpu_almost_hot_limit_cpu {
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trip = <&cpu_alert_almost_hot>;
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cooling-device = <&cpu0 5 6>, <&cpu1 5 6>, <&cpu2 5 6>,
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<&cpu3 5 6>;
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};
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cpu_hot_limit_cpu {
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trip = <&cpu_alert_hot>;
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cooling-device = <&cpu0 7 7>, <&cpu1 7 7>, <&cpu2 7 7>,
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<&cpu3 7 7>;
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};
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cpu_hotter_limit_cpu {
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trip = <&cpu_alert_hotter>;
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cooling-device = <&cpu0 7 8>, <&cpu1 7 8>, <&cpu2 7 8>,
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<&cpu3 7 8>;
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};
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cpu_very_hot_limit_cpu {
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trip = <&cpu_alert_very_hot>;
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cooling-device = <&cpu0 8 THERMAL_NO_LIMIT>,
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<&cpu1 8 THERMAL_NO_LIMIT>,
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<&cpu2 8 THERMAL_NO_LIMIT>,
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<&cpu3 8 THERMAL_NO_LIMIT>;
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};
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};
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};
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&emmc {
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/delete-property/mmc-hs200-1_8v;
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};
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&i2c2 {
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status = "disabled";
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};
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&i2c4 {
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status = "disabled";
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};
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&i2s {
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status = "okay";
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clock-names = "i2s_hclk", "i2s_clk", "i2s_clk_out";
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clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>, <&cru SCLK_I2S0_OUT>;
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};
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&rk808 {
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
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dvs-gpios = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>,
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<&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>;
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/delete-property/ vcc6-supply;
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/delete-property/ vcc12-supply;
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vcc11-supply = <&vcc33_sys>;
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regulators {
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/* vcc33_io is sourced directly from vcc33_sys */
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/delete-node/ LDO_REG1;
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/delete-node/ LDO_REG7;
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/* This is not a pwren anymore, but the real power supply */
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vdd10_lcd: LDO_REG7 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-name = "vdd10_lcd";
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regulator-suspend-mem-disabled;
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};
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vcc18_lcd: LDO_REG8 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc18_lcd";
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regulator-suspend-mem-disabled;
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};
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};
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};
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&pinctrl {
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hdmi {
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power_hdmi_on: power-hdmi-on {
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rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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pmic {
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dvs_1: dvs-1 {
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rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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dvs_2: dvs-2 {
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rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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};
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};
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&usb_host0_ehci {
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status = "disabled";
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};
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&usb_host1 {
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status = "disabled";
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};
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&vcc50_hdmi {
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enable-active-high;
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gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&power_hdmi_on>;
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};
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