Arnd Bergmann a3116c8881 RISC-V SoC Kconfig Updates for v6.10 ... A few different bits of SoC-related Kconfig work. The first part of this is shared with the DT updates - the modification of all SOC_CANAAN users to SOC_CANAAN_K210 to split the existing m-mode nommu k210 away from the k230 that is able to be used in a "common" kernel. The other thing here is the removal of most of the SOC_VENDOR options, with their ARCH_VENDOR equivalents that've been waiting in the wings for 1 year+ now made visible. Due a lapse on my part when originally adding the ARCH_VENDOR stuff, the Microchip transition isn't complete - the _POLARFIRE was a mistake to keep as there's gonna be non-PolarFire RISC-V stuff from Microchip soonTM. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZjUIHwAKCRB4tDGHoIJi 0r8RAQD+B5rJde/sQuQlmkJGrmZfyE/6/I1ZFxv0/xHhRPNWRAD/RFTTDthL/7c4 frMGl/nWSD3fvGmXrQ7Dp6wc1APIdQI= =BWHh -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmY57kAACgkQYKtH/8kJ Uie0Sg/8D8tZVOtBrpVJG/P5F7W1QdcC336GHBMQCho38C0/4AK5ltvdyxmSxmCl k84qaLdYNrGIvJ5o6MRmSAZyzT3y3jLYVA8C2Zsrp+Do8KkvvJGl219pUvp5A0J3 eoMApJ34wx6dQM9LfpLcvU9C3Z767KeiiRm0h5CTV0IUfJnZB/7IQgwSajEGLOr/ CHtFZpbYK6VgCDgVhbacSY8495jJrIU4i5RDlILst5K64XrmS2UU2oen2L3X/u8h xi5nQ//3qCiIfp5UqvBY12OYF8lVzB+F/Uo9vDCpeF9HFiIE69qMgYJiSviCPbwH T54zue+oBPGfL57HQoMTYQGUG4GvlnW7JR841GsIlPjrs54uw2kXDZB586n3tqzN esAQCc/sNnCuUX9TYKKBzkIrmQ1oTPRdGO61r+lSgxjYQ/ed++eh6KStlbPmttVo piEaxSpLS7TOZcVOyXHFrWK6OR4yB6MD6ZvOGJlJKJZSdfMNTlGcoymiJ0j7hVQb QJSr3LaIfQMP+Uf5ZWWlNZIxvwxQKER8v6MbyH3vGAVYa+DnDBzaj9Fh364thJnt Uybpz7SDQMIugnB+uSe+D1o65XfTEKOn/OHXYEQVYyoWs63QfTE9012+Q4KqBFBQ 5ylIkvM9r3xMBkzZT3EU8lgr5gx9r5QQuX9czJ7INSBxo4SmuKE= =QGOJ -----END PGP SIGNATURE----- Merge tag 'riscv-config-for-v6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers RISC-V SoC Kconfig Updates for v6.10 A few different bits of SoC-related Kconfig work. The first part of this is shared with the DT updates - the modification of all SOC_CANAAN users to SOC_CANAAN_K210 to split the existing m-mode nommu k210 away from the k230 that is able to be used in a "common" kernel. The other thing here is the removal of most of the SOC_VENDOR options, with their ARCH_VENDOR equivalents that've been waiting in the wings for 1 year+ now made visible. Due a lapse on my part when originally adding the ARCH_VENDOR stuff, the Microchip transition isn't complete - the _POLARFIRE was a mistake to keep as there's gonna be non-PolarFire RISC-V stuff from Microchip soonTM. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-config-for-v6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: riscv: config: enable ARCH_CANAAN in defconfig RISC-V: drop SOC_VIRT for ARCH_VIRT RISC-V: drop SOC_SIFIVE for ARCH_SIFIVE RISC-V: drop SOC_MICROCHIP_POLARFIRE for ARCH_MICROCHIP RISC-V: Drop unused SOC_CANAAN reset: k210: Deprecate SOC_CANAAN and use SOC_CANAAN_K210 pinctrl: k210: Deprecate SOC_CANAAN and use SOC_CANAAN_K210 clk: k210: Deprecate SOC_CANAAN and use SOC_CANAAN_K210 soc: canaan: Deprecate SOC_CANAAN and use SOC_CANAAN_K210 for K210 riscv: Kconfig.socs: Split ARCH_CANAAN and SOC_CANAAN_K210 Link: https://lore.kernel.org/r/20240503-mardi-underling-3d81a9f97329@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de>		2024-05-07 11:02:56 +02:00
..
boot	RISC-V Patches for the 6.9 Merge Window	2024-03-22 10:41:13 -07:00
configs	riscv: config: enable ARCH_CANAAN in defconfig	2024-04-10 11:42:13 +01:00
crypto	crypto: riscv - add vector crypto accelerated AES-CBC-CTS	2024-03-20 08:56:11 -07:00
errata	riscv: errata: Rename defines for Andes	2024-03-12 07:13:12 -07:00
include	riscv: mm: implement pgprot_nx	2024-03-27 07:09:06 -07:00
kernel	riscv: process: Fix kernel gp leakage	2024-04-04 12:35:05 -07:00
kvm	RISC-V: KVM: Fix APLIC in_clrip[x] read emulation	2024-03-26 09:40:55 +05:30
lib	RISC-V Patches for the 6.9 Merge Window	2024-03-22 10:41:13 -07:00
mm	riscv: mm: Fix prototype to avoid discarding const	2024-03-26 08:26:43 -07:00
net	riscv, bpf: Fix kfunc parameters incompatibility between bpf and riscv abi	2024-03-25 11:39:31 -07:00
purgatory	riscv: Use SYM_*() assembly macros instead of deprecated ones	2023-11-06 09:42:47 -08:00
tools	riscv: Check relocations at compile time	2023-04-19 07:46:32 -07:00
Kbuild	RISC-V: hook new crypto subdir into build-system	2024-01-22 17:55:17 -08:00
Kconfig	RISC-V Patches for the 6.9 Merge Window	2024-03-22 10:41:13 -07:00
Kconfig.debug	riscv: Add tests for riscv module loading	2023-11-07 14:59:32 -08:00
Kconfig.errata	RISC-V Patches for the 6.8 Merge Window, Part 4	2024-01-20 11:06:04 -08:00
Kconfig.socs	RISC-V: drop SOC_VIRT for ARCH_VIRT	2024-04-10 11:37:50 +01:00
Makefile	RISC-V SoC Kconfig Updates for v6.10	2024-05-07 11:02:56 +02:00
Makefile.postlink	kbuild: remove ARCH_POSTLINK from module builds	2023-10-28 21:10:08 +09:00