linux/drivers/clk/mmp
Doug Brown e11a47f520 clk: mmp: pxa168: control shared SDH bits with separate clock
The PXA168 has a peculiar setup with the AXI clock enable control for
the SDHC controllers. The bits in the SDH0 register control the AXI
clock enable for both SDH0 and SDH1. Likewise, the bits in the SDH2
register control both SDH2 and SDH3. This is modeled with two new
parentless clocks that control the shared bits.

Previously, SDH0 had to be enabled in order for SDH1 to be used, and
when SDH1 was enabled, unused bits in the SDH1 register were being
controlled. This fixes those issues. A future commit will add support
for these new shared clocks to be enabled by the PXA168 SDHC driver.

Signed-off-by: Doug Brown <doug@schmorgal.com>
Link: https://lore.kernel.org/r/20220612192937.162952-13-doug@schmorgal.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30 13:34:07 -07:00
..
clk-apbc.c treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_56.RULE (part 2) 2022-06-10 14:51:35 +02:00
clk-apmu.c treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_56.RULE (part 2) 2022-06-10 14:51:35 +02:00
clk-audio.c clk: mmp2: fix build without CONFIG_PM 2021-01-12 12:10:55 -08:00
clk-frac.c treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_56.RULE (part 2) 2022-06-10 14:51:35 +02:00
clk-gate.c treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_56.RULE (part 2) 2022-06-10 14:51:35 +02:00
clk-mix.c treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_56.RULE (part 2) 2022-06-10 14:51:35 +02:00
clk-mmp2.c treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_56.RULE (part 2) 2022-06-10 14:51:35 +02:00
clk-of-mmp2.c treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_56.RULE (part 2) 2022-06-10 14:51:35 +02:00
clk-of-pxa168.c clk: mmp: pxa168: control shared SDH bits with separate clock 2022-09-30 13:34:07 -07:00
clk-of-pxa910.c treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_56.RULE (part 2) 2022-06-10 14:51:35 +02:00
clk-of-pxa1928.c treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_56.RULE (part 2) 2022-06-10 14:51:35 +02:00
clk-pll.c clk: mmp2: fix link error without mmp2 2020-04-13 12:20:06 -07:00
clk-pxa168.c treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_56.RULE (part 2) 2022-06-10 14:51:35 +02:00
clk-pxa910.c treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_56.RULE (part 2) 2022-06-10 14:51:35 +02:00
clk.c clk: mmp2: fix link error without mmp2 2020-04-13 12:20:06 -07:00
clk.h This time around we have 4 lines of diff in the core framework, removing a 2020-06-10 11:42:19 -07:00
Makefile clk: mmp2: Add audio clock controller driver 2020-05-27 17:55:12 -07:00
pwr-island.c clk: cleanup comments 2022-03-11 18:22:15 -08:00
reset.c License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
reset.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00