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d22bf40f46
The A23 has a R_PIO pin controller, similar to the one found on the A31 SoC. Add support for the pins controlled by the R_PIO controller. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
43 lines
766 B
Plaintext
43 lines
766 B
Plaintext
if ARCH_SUNXI
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config PINCTRL_SUNXI_COMMON
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bool
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select PINMUX
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select GENERIC_PINCONF
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config PINCTRL_SUN4I_A10
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def_bool MACH_SUN4I
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select PINCTRL_SUNXI_COMMON
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config PINCTRL_SUN5I_A10S
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def_bool MACH_SUN5I
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select PINCTRL_SUNXI_COMMON
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config PINCTRL_SUN5I_A13
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def_bool MACH_SUN5I
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select PINCTRL_SUNXI_COMMON
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config PINCTRL_SUN6I_A31
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def_bool MACH_SUN6I
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select PINCTRL_SUNXI_COMMON
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config PINCTRL_SUN6I_A31_R
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def_bool MACH_SUN6I
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depends on RESET_CONTROLLER
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select PINCTRL_SUNXI_COMMON
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config PINCTRL_SUN7I_A20
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def_bool MACH_SUN7I
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select PINCTRL_SUNXI_COMMON
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config PINCTRL_SUN8I_A23
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def_bool MACH_SUN8I
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select PINCTRL_SUNXI_COMMON
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config PINCTRL_SUN8I_A23_R
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def_bool MACH_SUN8I
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depends on RESET_CONTROLLER
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select PINCTRL_SUNXI_COMMON
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endif
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