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a09e64fbc0
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
807 lines
17 KiB
C
807 lines
17 KiB
C
/*
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* linux/arch/arm/mach-pxa/cm-x270.c
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*
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* Copyright (C) 2007, 2008 CompuLab, Ltd.
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* Mike Rapoport <mike@compulab.co.il>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/platform_device.h>
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#include <linux/sysdev.h>
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#include <linux/irq.h>
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#include <linux/gpio.h>
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#include <linux/dm9000.h>
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#include <linux/rtc-v3020.h>
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#include <video/mbxfb.h>
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#include <linux/leds.h>
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#include <asm/mach/arch.h>
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#include <asm/mach-types.h>
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#include <asm/mach/map.h>
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#include <mach/pxa2xx-regs.h>
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#include <mach/mfp-pxa27x.h>
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#include <mach/pxa-regs.h>
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#include <mach/audio.h>
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#include <mach/pxafb.h>
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#include <mach/ohci.h>
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#include <mach/mmc.h>
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#include <mach/bitfield.h>
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#include <asm/hardware/it8152.h>
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#include "generic.h"
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#include "cm-x270-pci.h"
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/* virtual addresses for statically mapped regions */
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#define CMX270_VIRT_BASE (0xe8000000)
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#define CMX270_IT8152_VIRT (CMX270_VIRT_BASE)
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#define RTC_PHYS_BASE (PXA_CS1_PHYS + (5 << 22))
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#define DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22))
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/* GPIO IRQ usage */
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#define GPIO10_ETHIRQ (10)
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#define GPIO22_IT8152_IRQ (22)
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#define GPIO83_MMC_IRQ (83)
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#define GPIO95_GFXIRQ (95)
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#define CMX270_ETHIRQ IRQ_GPIO(GPIO10_ETHIRQ)
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#define CMX270_IT8152_IRQ IRQ_GPIO(GPIO22_IT8152_IRQ)
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#define CMX270_MMC_IRQ IRQ_GPIO(GPIO83_MMC_IRQ)
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#define CMX270_GFXIRQ IRQ_GPIO(GPIO95_GFXIRQ)
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/* MMC power enable */
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#define GPIO105_MMC_POWER (105)
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static unsigned long cmx270_pin_config[] = {
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/* AC'97 */
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GPIO28_AC97_BITCLK,
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GPIO29_AC97_SDATA_IN_0,
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GPIO30_AC97_SDATA_OUT,
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GPIO31_AC97_SYNC,
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GPIO98_AC97_SYSCLK,
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GPIO113_AC97_nRESET,
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/* BTUART */
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GPIO42_BTUART_RXD,
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GPIO43_BTUART_TXD,
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GPIO44_BTUART_CTS,
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GPIO45_BTUART_RTS,
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/* STUART */
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GPIO46_STUART_RXD,
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GPIO47_STUART_TXD,
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/* MCI controller */
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GPIO32_MMC_CLK,
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GPIO112_MMC_CMD,
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GPIO92_MMC_DAT_0,
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GPIO109_MMC_DAT_1,
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GPIO110_MMC_DAT_2,
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GPIO111_MMC_DAT_3,
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/* LCD */
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GPIO58_LCD_LDD_0,
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GPIO59_LCD_LDD_1,
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GPIO60_LCD_LDD_2,
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GPIO61_LCD_LDD_3,
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GPIO62_LCD_LDD_4,
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GPIO63_LCD_LDD_5,
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GPIO64_LCD_LDD_6,
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GPIO65_LCD_LDD_7,
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GPIO66_LCD_LDD_8,
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GPIO67_LCD_LDD_9,
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GPIO68_LCD_LDD_10,
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GPIO69_LCD_LDD_11,
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GPIO70_LCD_LDD_12,
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GPIO71_LCD_LDD_13,
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GPIO72_LCD_LDD_14,
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GPIO73_LCD_LDD_15,
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GPIO74_LCD_FCLK,
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GPIO75_LCD_LCLK,
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GPIO76_LCD_PCLK,
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GPIO77_LCD_BIAS,
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/* I2C */
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GPIO117_I2C_SCL,
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GPIO118_I2C_SDA,
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/* SSP1 */
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GPIO23_SSP1_SCLK,
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GPIO24_SSP1_SFRM,
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GPIO25_SSP1_TXD,
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GPIO26_SSP1_RXD,
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/* SSP2 */
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GPIO19_SSP2_SCLK,
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GPIO14_SSP2_SFRM,
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GPIO87_SSP2_TXD,
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GPIO88_SSP2_RXD,
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/* PC Card */
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GPIO48_nPOE,
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GPIO49_nPWE,
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GPIO50_nPIOR,
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GPIO51_nPIOW,
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GPIO85_nPCE_1,
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GPIO54_nPCE_2,
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GPIO55_nPREG,
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GPIO56_nPWAIT,
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GPIO57_nIOIS16,
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/* SDRAM and local bus */
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GPIO15_nCS_1,
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GPIO78_nCS_2,
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GPIO79_nCS_3,
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GPIO80_nCS_4,
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GPIO33_nCS_5,
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GPIO49_nPWE,
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GPIO18_RDY,
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/* GPIO */
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GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH,
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GPIO105_GPIO | MFP_LPM_DRIVE_HIGH, /* MMC/SD power */
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GPIO53_GPIO, /* PC card reset */
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/* NAND controls */
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GPIO11_GPIO | MFP_LPM_DRIVE_HIGH, /* NAND CE# */
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GPIO89_GPIO, /* NAND Ready/Busy */
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/* interrupts */
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GPIO10_GPIO, /* DM9000 interrupt */
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GPIO83_GPIO, /* MMC card detect */
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};
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#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
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static struct resource cmx270_dm9000_resource[] = {
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[0] = {
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.start = DM9000_PHYS_BASE,
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.end = DM9000_PHYS_BASE + 4,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = DM9000_PHYS_BASE + 8,
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.end = DM9000_PHYS_BASE + 8 + 500,
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.flags = IORESOURCE_MEM,
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},
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[2] = {
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.start = CMX270_ETHIRQ,
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.end = CMX270_ETHIRQ,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
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}
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};
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static struct dm9000_plat_data cmx270_dm9000_platdata = {
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.flags = DM9000_PLATF_32BITONLY,
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};
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static struct platform_device cmx270_dm9000_device = {
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.name = "dm9000",
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.id = 0,
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.num_resources = ARRAY_SIZE(cmx270_dm9000_resource),
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.resource = cmx270_dm9000_resource,
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.dev = {
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.platform_data = &cmx270_dm9000_platdata,
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}
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};
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static void __init cmx270_init_dm9000(void)
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{
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platform_device_register(&cmx270_dm9000_device);
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}
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#else
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static inline void cmx270_init_dm9000(void) {}
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#endif
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/* UCB1400 touchscreen controller */
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#if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
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static struct platform_device cmx270_ts_device = {
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.name = "ucb1400_ts",
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.id = -1,
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};
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static void __init cmx270_init_touchscreen(void)
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{
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platform_device_register(&cmx270_ts_device);
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}
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#else
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static inline void cmx270_init_touchscreen(void) {}
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#endif
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/* V3020 RTC */
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#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
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static struct resource cmx270_v3020_resource[] = {
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[0] = {
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.start = RTC_PHYS_BASE,
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.end = RTC_PHYS_BASE + 4,
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.flags = IORESOURCE_MEM,
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},
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};
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struct v3020_platform_data cmx270_v3020_pdata = {
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.leftshift = 16,
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};
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static struct platform_device cmx270_rtc_device = {
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.name = "v3020",
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.num_resources = ARRAY_SIZE(cmx270_v3020_resource),
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.resource = cmx270_v3020_resource,
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.id = -1,
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.dev = {
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.platform_data = &cmx270_v3020_pdata,
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}
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};
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static void __init cmx270_init_rtc(void)
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{
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platform_device_register(&cmx270_rtc_device);
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}
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#else
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static inline void cmx270_init_rtc(void) {}
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#endif
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/* CM-X270 LEDs */
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#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
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static struct gpio_led cmx270_leds[] = {
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[0] = {
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.name = "cm-x270:red",
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.default_trigger = "nand-disk",
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.gpio = 93,
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.active_low = 1,
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},
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[1] = {
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.name = "cm-x270:green",
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.default_trigger = "heartbeat",
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.gpio = 94,
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.active_low = 1,
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},
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};
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static struct gpio_led_platform_data cmx270_gpio_led_pdata = {
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.num_leds = ARRAY_SIZE(cmx270_leds),
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.leds = cmx270_leds,
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};
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static struct platform_device cmx270_led_device = {
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.name = "leds-gpio",
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.id = -1,
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.dev = {
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.platform_data = &cmx270_gpio_led_pdata,
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},
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};
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static void __init cmx270_init_leds(void)
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{
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platform_device_register(&cmx270_led_device);
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}
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#else
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static inline void cmx270_init_leds(void) {}
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#endif
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/* 2700G graphics */
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#if defined(CONFIG_FB_MBX) || defined(CONFIG_FB_MBX_MODULE)
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static u64 fb_dma_mask = ~(u64)0;
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static struct resource cmx270_2700G_resource[] = {
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/* frame buffer memory including ODFB and External SDRAM */
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[0] = {
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.start = PXA_CS2_PHYS,
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.end = PXA_CS2_PHYS + 0x01ffffff,
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.flags = IORESOURCE_MEM,
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},
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/* Marathon registers */
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[1] = {
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.start = PXA_CS2_PHYS + 0x03fe0000,
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.end = PXA_CS2_PHYS + 0x03ffffff,
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.flags = IORESOURCE_MEM,
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},
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};
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static unsigned long save_lcd_regs[10];
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static int cmx270_marathon_probe(struct fb_info *fb)
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{
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/* save PXA-270 pin settings before enabling 2700G */
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save_lcd_regs[0] = GPDR1;
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save_lcd_regs[1] = GPDR2;
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save_lcd_regs[2] = GAFR1_U;
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save_lcd_regs[3] = GAFR2_L;
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save_lcd_regs[4] = GAFR2_U;
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/* Disable PXA-270 on-chip controller driving pins */
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GPDR1 &= ~(0xfc000000);
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GPDR2 &= ~(0x00c03fff);
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GAFR1_U &= ~(0xfff00000);
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GAFR2_L &= ~(0x0fffffff);
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GAFR2_U &= ~(0x0000f000);
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return 0;
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}
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static int cmx270_marathon_remove(struct fb_info *fb)
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{
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GPDR1 = save_lcd_regs[0];
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GPDR2 = save_lcd_regs[1];
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GAFR1_U = save_lcd_regs[2];
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GAFR2_L = save_lcd_regs[3];
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GAFR2_U = save_lcd_regs[4];
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return 0;
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}
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static struct mbxfb_platform_data cmx270_2700G_data = {
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.xres = {
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.min = 240,
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.max = 1200,
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.defval = 640,
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},
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.yres = {
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.min = 240,
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.max = 1200,
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.defval = 480,
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},
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.bpp = {
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.min = 16,
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.max = 32,
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.defval = 16,
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},
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.memsize = 8*1024*1024,
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.probe = cmx270_marathon_probe,
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.remove = cmx270_marathon_remove,
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};
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static struct platform_device cmx270_2700G = {
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.name = "mbx-fb",
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.dev = {
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.platform_data = &cmx270_2700G_data,
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.dma_mask = &fb_dma_mask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(cmx270_2700G_resource),
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.resource = cmx270_2700G_resource,
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.id = -1,
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};
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static void __init cmx270_init_2700G(void)
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{
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platform_device_register(&cmx270_2700G);
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}
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#else
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static inline void cmx270_init_2700G(void) {}
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#endif
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#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
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/*
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Display definitions
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keep these for backwards compatibility, although symbolic names (as
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e.g. in lpd270.c) looks better
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*/
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#define MTYPE_STN320x240 0
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#define MTYPE_TFT640x480 1
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#define MTYPE_CRT640x480 2
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#define MTYPE_CRT800x600 3
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#define MTYPE_TFT320x240 6
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#define MTYPE_STN640x480 7
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static struct pxafb_mode_info generic_stn_320x240_mode = {
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.pixclock = 76923,
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.bpp = 8,
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.xres = 320,
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.yres = 240,
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.hsync_len = 3,
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.vsync_len = 2,
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.left_margin = 3,
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.upper_margin = 0,
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.right_margin = 3,
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.lower_margin = 0,
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.sync = (FB_SYNC_HOR_HIGH_ACT |
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FB_SYNC_VERT_HIGH_ACT),
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.cmap_greyscale = 0,
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};
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static struct pxafb_mach_info generic_stn_320x240 = {
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.modes = &generic_stn_320x240_mode,
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.num_modes = 1,
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.lccr0 = 0,
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.lccr3 = (LCCR3_PixClkDiv(0x03) |
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LCCR3_Acb(0xff) |
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LCCR3_PCP),
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.cmap_inverse = 0,
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.cmap_static = 0,
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};
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static struct pxafb_mode_info generic_tft_640x480_mode = {
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.pixclock = 38461,
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.bpp = 8,
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.xres = 640,
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.yres = 480,
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.hsync_len = 60,
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.vsync_len = 2,
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.left_margin = 70,
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.upper_margin = 10,
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.right_margin = 70,
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.lower_margin = 5,
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.sync = 0,
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.cmap_greyscale = 0,
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};
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static struct pxafb_mach_info generic_tft_640x480 = {
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.modes = &generic_tft_640x480_mode,
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.num_modes = 1,
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.lccr0 = (LCCR0_PAS),
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.lccr3 = (LCCR3_PixClkDiv(0x01) |
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LCCR3_Acb(0xff) |
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LCCR3_PCP),
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.cmap_inverse = 0,
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.cmap_static = 0,
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};
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static struct pxafb_mode_info generic_crt_640x480_mode = {
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.pixclock = 38461,
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.bpp = 8,
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.xres = 640,
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.yres = 480,
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.hsync_len = 63,
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.vsync_len = 2,
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.left_margin = 81,
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.upper_margin = 33,
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.right_margin = 16,
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.lower_margin = 10,
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.sync = (FB_SYNC_HOR_HIGH_ACT |
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FB_SYNC_VERT_HIGH_ACT),
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.cmap_greyscale = 0,
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};
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static struct pxafb_mach_info generic_crt_640x480 = {
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.modes = &generic_crt_640x480_mode,
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.num_modes = 1,
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.lccr0 = (LCCR0_PAS),
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.lccr3 = (LCCR3_PixClkDiv(0x01) |
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LCCR3_Acb(0xff)),
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.cmap_inverse = 0,
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.cmap_static = 0,
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};
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static struct pxafb_mode_info generic_crt_800x600_mode = {
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.pixclock = 28846,
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.bpp = 8,
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.xres = 800,
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.yres = 600,
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.hsync_len = 63,
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.vsync_len = 2,
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.left_margin = 26,
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.upper_margin = 21,
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.right_margin = 26,
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.lower_margin = 11,
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.sync = (FB_SYNC_HOR_HIGH_ACT |
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FB_SYNC_VERT_HIGH_ACT),
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.cmap_greyscale = 0,
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};
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static struct pxafb_mach_info generic_crt_800x600 = {
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.modes = &generic_crt_800x600_mode,
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.num_modes = 1,
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.lccr0 = (LCCR0_PAS),
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.lccr3 = (LCCR3_PixClkDiv(0x02) |
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LCCR3_Acb(0xff)),
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.cmap_inverse = 0,
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.cmap_static = 0,
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};
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static struct pxafb_mode_info generic_tft_320x240_mode = {
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.pixclock = 134615,
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.bpp = 16,
|
|
.xres = 320,
|
|
.yres = 240,
|
|
.hsync_len = 63,
|
|
.vsync_len = 7,
|
|
.left_margin = 75,
|
|
.upper_margin = 0,
|
|
.right_margin = 15,
|
|
.lower_margin = 15,
|
|
.sync = 0,
|
|
.cmap_greyscale = 0,
|
|
};
|
|
|
|
static struct pxafb_mach_info generic_tft_320x240 = {
|
|
.modes = &generic_tft_320x240_mode,
|
|
.num_modes = 1,
|
|
.lccr0 = (LCCR0_PAS),
|
|
.lccr3 = (LCCR3_PixClkDiv(0x06) |
|
|
LCCR3_Acb(0xff) |
|
|
LCCR3_PCP),
|
|
.cmap_inverse = 0,
|
|
.cmap_static = 0,
|
|
};
|
|
|
|
static struct pxafb_mode_info generic_stn_640x480_mode = {
|
|
.pixclock = 57692,
|
|
.bpp = 8,
|
|
.xres = 640,
|
|
.yres = 480,
|
|
.hsync_len = 4,
|
|
.vsync_len = 2,
|
|
.left_margin = 10,
|
|
.upper_margin = 5,
|
|
.right_margin = 10,
|
|
.lower_margin = 5,
|
|
.sync = (FB_SYNC_HOR_HIGH_ACT |
|
|
FB_SYNC_VERT_HIGH_ACT),
|
|
.cmap_greyscale = 0,
|
|
};
|
|
|
|
static struct pxafb_mach_info generic_stn_640x480 = {
|
|
.modes = &generic_stn_640x480_mode,
|
|
.num_modes = 1,
|
|
.lccr0 = 0,
|
|
.lccr3 = (LCCR3_PixClkDiv(0x02) |
|
|
LCCR3_Acb(0xff)),
|
|
.cmap_inverse = 0,
|
|
.cmap_static = 0,
|
|
};
|
|
|
|
static struct pxafb_mach_info *cmx270_display = &generic_crt_640x480;
|
|
|
|
static int __init cmx270_set_display(char *str)
|
|
{
|
|
int disp_type = simple_strtol(str, NULL, 0);
|
|
switch (disp_type) {
|
|
case MTYPE_STN320x240:
|
|
cmx270_display = &generic_stn_320x240;
|
|
break;
|
|
case MTYPE_TFT640x480:
|
|
cmx270_display = &generic_tft_640x480;
|
|
break;
|
|
case MTYPE_CRT640x480:
|
|
cmx270_display = &generic_crt_640x480;
|
|
break;
|
|
case MTYPE_CRT800x600:
|
|
cmx270_display = &generic_crt_800x600;
|
|
break;
|
|
case MTYPE_TFT320x240:
|
|
cmx270_display = &generic_tft_320x240;
|
|
break;
|
|
case MTYPE_STN640x480:
|
|
cmx270_display = &generic_stn_640x480;
|
|
break;
|
|
default: /* fallback to CRT 640x480 */
|
|
cmx270_display = &generic_crt_640x480;
|
|
break;
|
|
}
|
|
return 1;
|
|
}
|
|
|
|
/*
|
|
This should be done really early to get proper configuration for
|
|
frame buffer.
|
|
Indeed, pxafb parameters can be used istead, but CM-X270 bootloader
|
|
has limitied line length for kernel command line, and also it will
|
|
break compatibitlty with proprietary releases already in field.
|
|
*/
|
|
__setup("monitor=", cmx270_set_display);
|
|
|
|
static void __init cmx270_init_display(void)
|
|
{
|
|
set_pxa_fb_info(cmx270_display);
|
|
}
|
|
#else
|
|
static inline void cmx270_init_display(void) {}
|
|
#endif
|
|
|
|
/* PXA27x OHCI controller setup */
|
|
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
|
|
static int cmx270_ohci_init(struct device *dev)
|
|
{
|
|
/* Set the Power Control Polarity Low */
|
|
UHCHR = (UHCHR | UHCHR_PCPL) &
|
|
~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct pxaohci_platform_data cmx270_ohci_platform_data = {
|
|
.port_mode = PMM_PERPORT_MODE,
|
|
.init = cmx270_ohci_init,
|
|
};
|
|
|
|
static void __init cmx270_init_ohci(void)
|
|
{
|
|
pxa_set_ohci_info(&cmx270_ohci_platform_data);
|
|
}
|
|
#else
|
|
static inline void cmx270_init_ohci(void) {}
|
|
#endif
|
|
|
|
#if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE)
|
|
static int cmx270_mci_init(struct device *dev,
|
|
irq_handler_t cmx270_detect_int,
|
|
void *data)
|
|
{
|
|
int err;
|
|
|
|
err = gpio_request(GPIO105_MMC_POWER, "MMC/SD power");
|
|
if (err) {
|
|
dev_warn(dev, "power gpio unavailable\n");
|
|
return err;
|
|
}
|
|
|
|
gpio_direction_output(GPIO105_MMC_POWER, 0);
|
|
|
|
err = request_irq(CMX270_MMC_IRQ, cmx270_detect_int,
|
|
IRQF_DISABLED | IRQF_TRIGGER_FALLING,
|
|
"MMC card detect", data);
|
|
if (err) {
|
|
gpio_free(GPIO105_MMC_POWER);
|
|
dev_err(dev, "cmx270_mci_init: MMC/SD: can't"
|
|
" request MMC card detect IRQ\n");
|
|
}
|
|
|
|
return err;
|
|
}
|
|
|
|
static void cmx270_mci_setpower(struct device *dev, unsigned int vdd)
|
|
{
|
|
struct pxamci_platform_data *p_d = dev->platform_data;
|
|
|
|
if ((1 << vdd) & p_d->ocr_mask) {
|
|
dev_dbg(dev, "power on\n");
|
|
gpio_set_value(GPIO105_MMC_POWER, 0);
|
|
} else {
|
|
gpio_set_value(GPIO105_MMC_POWER, 1);
|
|
dev_dbg(dev, "power off\n");
|
|
}
|
|
}
|
|
|
|
static void cmx270_mci_exit(struct device *dev, void *data)
|
|
{
|
|
free_irq(CMX270_MMC_IRQ, data);
|
|
gpio_free(GPIO105_MMC_POWER);
|
|
}
|
|
|
|
static struct pxamci_platform_data cmx270_mci_platform_data = {
|
|
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
|
|
.init = cmx270_mci_init,
|
|
.setpower = cmx270_mci_setpower,
|
|
.exit = cmx270_mci_exit,
|
|
};
|
|
|
|
static void __init cmx270_init_mmc(void)
|
|
{
|
|
pxa_set_mci_info(&cmx270_mci_platform_data);
|
|
}
|
|
#else
|
|
static inline void cmx270_init_mmc(void) {}
|
|
#endif
|
|
|
|
#ifdef CONFIG_PM
|
|
static unsigned long sleep_save_msc[10];
|
|
|
|
static int cmx270_suspend(struct sys_device *dev, pm_message_t state)
|
|
{
|
|
cmx270_pci_suspend();
|
|
|
|
/* save MSC registers */
|
|
sleep_save_msc[0] = MSC0;
|
|
sleep_save_msc[1] = MSC1;
|
|
sleep_save_msc[2] = MSC2;
|
|
|
|
/* setup power saving mode registers */
|
|
PCFR = 0x0;
|
|
PSLR = 0xff400000;
|
|
PMCR = 0x00000005;
|
|
PWER = 0x80000000;
|
|
PFER = 0x00000000;
|
|
PRER = 0x00000000;
|
|
PGSR0 = 0xC0018800;
|
|
PGSR1 = 0x004F0002;
|
|
PGSR2 = 0x6021C000;
|
|
PGSR3 = 0x00020000;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int cmx270_resume(struct sys_device *dev)
|
|
{
|
|
cmx270_pci_resume();
|
|
|
|
/* restore MSC registers */
|
|
MSC0 = sleep_save_msc[0];
|
|
MSC1 = sleep_save_msc[1];
|
|
MSC2 = sleep_save_msc[2];
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct sysdev_class cmx270_pm_sysclass = {
|
|
.name = "pm",
|
|
.resume = cmx270_resume,
|
|
.suspend = cmx270_suspend,
|
|
};
|
|
|
|
static struct sys_device cmx270_pm_device = {
|
|
.cls = &cmx270_pm_sysclass,
|
|
};
|
|
|
|
static int __init cmx270_pm_init(void)
|
|
{
|
|
int error;
|
|
error = sysdev_class_register(&cmx270_pm_sysclass);
|
|
if (error == 0)
|
|
error = sysdev_register(&cmx270_pm_device);
|
|
return error;
|
|
}
|
|
#else
|
|
static int __init cmx270_pm_init(void) { return 0; }
|
|
#endif
|
|
|
|
#if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
|
|
static void __init cmx270_init_ac97(void)
|
|
{
|
|
pxa_set_ac97_info(NULL);
|
|
}
|
|
#else
|
|
static inline void cmx270_init_ac97(void) {}
|
|
#endif
|
|
|
|
static void __init cmx270_init(void)
|
|
{
|
|
cmx270_pm_init();
|
|
|
|
pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_pin_config));
|
|
|
|
cmx270_init_dm9000();
|
|
cmx270_init_rtc();
|
|
cmx270_init_display();
|
|
cmx270_init_mmc();
|
|
cmx270_init_ohci();
|
|
cmx270_init_ac97();
|
|
cmx270_init_touchscreen();
|
|
cmx270_init_leds();
|
|
cmx270_init_2700G();
|
|
}
|
|
|
|
static void __init cmx270_init_irq(void)
|
|
{
|
|
pxa27x_init_irq();
|
|
|
|
cmx270_pci_init_irq(GPIO22_IT8152_IRQ);
|
|
}
|
|
|
|
#ifdef CONFIG_PCI
|
|
/* Map PCI companion statically */
|
|
static struct map_desc cmx270_io_desc[] __initdata = {
|
|
[0] = { /* PCI bridge */
|
|
.virtual = CMX270_IT8152_VIRT,
|
|
.pfn = __phys_to_pfn(PXA_CS4_PHYS),
|
|
.length = SZ_64M,
|
|
.type = MT_DEVICE
|
|
},
|
|
};
|
|
|
|
static void __init cmx270_map_io(void)
|
|
{
|
|
pxa_map_io();
|
|
iotable_init(cmx270_io_desc, ARRAY_SIZE(cmx270_io_desc));
|
|
|
|
it8152_base_address = CMX270_IT8152_VIRT;
|
|
}
|
|
#else
|
|
static void __init cmx270_map_io(void)
|
|
{
|
|
pxa_map_io();
|
|
}
|
|
#endif
|
|
|
|
MACHINE_START(ARMCORE, "Compulab CM-x270")
|
|
.boot_params = 0xa0000100,
|
|
.phys_io = 0x40000000,
|
|
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
|
|
.map_io = cmx270_map_io,
|
|
.init_irq = cmx270_init_irq,
|
|
.timer = &pxa_timer,
|
|
.init_machine = cmx270_init,
|
|
MACHINE_END
|