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664399e1fb
This is part of Thomas Gleixner's generic IRQ patch, which converts ARM to use the generic IRQ subsystem. Here, we wrap calls to desc->handler() in an inline function, desc_handle_irq(). This reduces the size of Thomas' patch since the changes become more localised. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
280 lines
6.5 KiB
C
280 lines
6.5 KiB
C
/*
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* linux/arch/arm/mach-pxa/lubbock.c
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*
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* Support for the Intel DBPXA250 Development Platform.
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*
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* Author: Nicolas Pitre
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* Created: Jun 15, 2001
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* Copyright: MontaVista Software Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/sysdev.h>
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#include <linux/major.h>
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#include <linux/fb.h>
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#include <linux/interrupt.h>
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#include <asm/setup.h>
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#include <asm/memory.h>
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#include <asm/mach-types.h>
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#include <asm/hardware.h>
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#include <asm/irq.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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#include <asm/hardware/sa1111.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/arch/lubbock.h>
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#include <asm/arch/udc.h>
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#include <asm/arch/pxafb.h>
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#include <asm/arch/mmc.h>
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#include "generic.h"
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#define LUB_MISC_WR __LUB_REG(LUBBOCK_FPGA_PHYS + 0x080)
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void lubbock_set_misc_wr(unsigned int mask, unsigned int set)
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{
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unsigned long flags;
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local_irq_save(flags);
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LUB_MISC_WR = (LUB_MISC_WR & ~mask) | (set & mask);
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local_irq_restore(flags);
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}
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EXPORT_SYMBOL(lubbock_set_misc_wr);
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static unsigned long lubbock_irq_enabled;
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static void lubbock_mask_irq(unsigned int irq)
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{
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int lubbock_irq = (irq - LUBBOCK_IRQ(0));
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LUB_IRQ_MASK_EN = (lubbock_irq_enabled &= ~(1 << lubbock_irq));
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}
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static void lubbock_unmask_irq(unsigned int irq)
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{
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int lubbock_irq = (irq - LUBBOCK_IRQ(0));
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/* the irq can be acknowledged only if deasserted, so it's done here */
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LUB_IRQ_SET_CLR &= ~(1 << lubbock_irq);
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LUB_IRQ_MASK_EN = (lubbock_irq_enabled |= (1 << lubbock_irq));
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}
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static struct irqchip lubbock_irq_chip = {
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.ack = lubbock_mask_irq,
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.mask = lubbock_mask_irq,
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.unmask = lubbock_unmask_irq,
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};
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static void lubbock_irq_handler(unsigned int irq, struct irqdesc *desc,
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struct pt_regs *regs)
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{
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unsigned long pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled;
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do {
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GEDR(0) = GPIO_bit(0); /* clear our parent irq */
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if (likely(pending)) {
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irq = LUBBOCK_IRQ(0) + __ffs(pending);
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desc = irq_desc + irq;
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desc_handle_irq(irq, desc, regs);
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}
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pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled;
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} while (pending);
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}
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static void __init lubbock_init_irq(void)
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{
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int irq;
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pxa_init_irq();
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/* setup extra lubbock irqs */
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for (irq = LUBBOCK_IRQ(0); irq <= LUBBOCK_LAST_IRQ; irq++) {
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set_irq_chip(irq, &lubbock_irq_chip);
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set_irq_handler(irq, do_level_IRQ);
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set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
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}
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set_irq_chained_handler(IRQ_GPIO(0), lubbock_irq_handler);
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set_irq_type(IRQ_GPIO(0), IRQT_FALLING);
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}
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#ifdef CONFIG_PM
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static int lubbock_irq_resume(struct sys_device *dev)
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{
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LUB_IRQ_MASK_EN = lubbock_irq_enabled;
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return 0;
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}
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static struct sysdev_class lubbock_irq_sysclass = {
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set_kset_name("cpld_irq"),
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.resume = lubbock_irq_resume,
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};
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static struct sys_device lubbock_irq_device = {
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.cls = &lubbock_irq_sysclass,
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};
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static int __init lubbock_irq_device_init(void)
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{
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int ret = sysdev_class_register(&lubbock_irq_sysclass);
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if (ret == 0)
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ret = sysdev_register(&lubbock_irq_device);
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return ret;
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}
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device_initcall(lubbock_irq_device_init);
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#endif
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static int lubbock_udc_is_connected(void)
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{
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return (LUB_MISC_RD & (1 << 9)) == 0;
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}
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static struct pxa2xx_udc_mach_info udc_info __initdata = {
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.udc_is_connected = lubbock_udc_is_connected,
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// no D+ pullup; lubbock can't connect/disconnect in software
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};
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static struct resource sa1111_resources[] = {
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[0] = {
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.start = 0x10000000,
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.end = 0x10001fff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = LUBBOCK_SA1111_IRQ,
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.end = LUBBOCK_SA1111_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device sa1111_device = {
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.name = "sa1111",
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.id = -1,
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.num_resources = ARRAY_SIZE(sa1111_resources),
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.resource = sa1111_resources,
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};
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static struct resource smc91x_resources[] = {
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[0] = {
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.name = "smc91x-regs",
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.start = 0x0c000000,
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.end = 0x0c0fffff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = LUBBOCK_ETH_IRQ,
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.end = LUBBOCK_ETH_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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.name = "smc91x-attrib",
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.start = 0x0e000000,
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.end = 0x0e0fffff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device smc91x_device = {
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.name = "smc91x",
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.id = -1,
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.num_resources = ARRAY_SIZE(smc91x_resources),
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.resource = smc91x_resources,
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};
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static struct platform_device *devices[] __initdata = {
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&sa1111_device,
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&smc91x_device,
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};
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static struct pxafb_mach_info sharp_lm8v31 __initdata = {
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.pixclock = 270000,
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.xres = 640,
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.yres = 480,
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.bpp = 16,
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.hsync_len = 1,
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.left_margin = 3,
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.right_margin = 3,
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.vsync_len = 1,
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.upper_margin = 0,
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.lower_margin = 0,
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.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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.cmap_greyscale = 0,
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.cmap_inverse = 0,
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.cmap_static = 0,
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.lccr0 = LCCR0_SDS,
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.lccr3 = LCCR3_PCP | LCCR3_Acb(255),
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};
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static int lubbock_mci_init(struct device *dev, irqreturn_t (*lubbock_detect_int)(int, void *, struct pt_regs *), void *data)
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{
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/* setup GPIO for PXA25x MMC controller */
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pxa_gpio_mode(GPIO6_MMCCLK_MD);
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pxa_gpio_mode(GPIO8_MMCCS0_MD);
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return 0;
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}
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static struct pxamci_platform_data lubbock_mci_platform_data = {
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.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
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.init = lubbock_mci_init,
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};
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static void __init lubbock_init(void)
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{
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pxa_set_udc_info(&udc_info);
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set_pxa_fb_info(&sharp_lm8v31);
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pxa_set_mci_info(&lubbock_mci_platform_data);
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(void) platform_add_devices(devices, ARRAY_SIZE(devices));
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}
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static struct map_desc lubbock_io_desc[] __initdata = {
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{ LUBBOCK_FPGA_VIRT, LUBBOCK_FPGA_PHYS, 0x00100000, MT_DEVICE }, /* CPLD */
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};
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static void __init lubbock_map_io(void)
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{
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pxa_map_io();
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iotable_init(lubbock_io_desc, ARRAY_SIZE(lubbock_io_desc));
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/* This enables the BTUART */
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pxa_gpio_mode(GPIO42_BTRXD_MD);
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pxa_gpio_mode(GPIO43_BTTXD_MD);
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pxa_gpio_mode(GPIO44_BTCTS_MD);
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pxa_gpio_mode(GPIO45_BTRTS_MD);
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/* This is for the SMC chip select */
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pxa_gpio_mode(GPIO79_nCS_3_MD);
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/* setup sleep mode values */
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PWER = 0x00000002;
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PFER = 0x00000000;
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PRER = 0x00000002;
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PGSR0 = 0x00008000;
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PGSR1 = 0x003F0202;
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PGSR2 = 0x0001C000;
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PCFR |= PCFR_OPDE;
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}
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MACHINE_START(LUBBOCK, "Intel DBPXA250 Development Platform (aka Lubbock)")
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/* Maintainer: MontaVista Software Inc. */
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.phys_ram = 0xa0000000,
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.phys_io = 0x40000000,
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.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
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.map_io = lubbock_map_io,
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.init_irq = lubbock_init_irq,
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.timer = &pxa_timer,
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.init_machine = lubbock_init,
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MACHINE_END
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