mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-14 15:54:15 +08:00
3fc5029a8f
The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20230304133028.2135435-26-u.kleine-koenig@pengutronix.de Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
554 lines
12 KiB
C
554 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* pm8xxx RTC driver
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*
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* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
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* Copyright (c) 2023, Linaro Limited
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*/
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#include <linux/of.h>
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#include <linux/module.h>
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#include <linux/nvmem-consumer.h>
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#include <linux/init.h>
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#include <linux/rtc.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <linux/pm_wakeirq.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <asm/unaligned.h>
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/* RTC_CTRL register bit fields */
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#define PM8xxx_RTC_ENABLE BIT(7)
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#define PM8xxx_RTC_ALARM_CLEAR BIT(0)
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#define PM8xxx_RTC_ALARM_ENABLE BIT(7)
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#define NUM_8_BIT_RTC_REGS 0x4
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/**
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* struct pm8xxx_rtc_regs - describe RTC registers per PMIC versions
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* @ctrl: address of control register
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* @write: base address of write registers
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* @read: base address of read registers
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* @alarm_ctrl: address of alarm control register
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* @alarm_ctrl2: address of alarm control2 register
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* @alarm_rw: base address of alarm read-write registers
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* @alarm_en: alarm enable mask
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*/
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struct pm8xxx_rtc_regs {
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unsigned int ctrl;
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unsigned int write;
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unsigned int read;
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unsigned int alarm_ctrl;
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unsigned int alarm_ctrl2;
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unsigned int alarm_rw;
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unsigned int alarm_en;
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};
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/**
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* struct pm8xxx_rtc - RTC driver internal structure
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* @rtc: RTC device
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* @regmap: regmap used to access registers
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* @allow_set_time: whether the time can be set
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* @alarm_irq: alarm irq number
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* @regs: register description
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* @dev: device structure
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* @nvmem_cell: nvmem cell for offset
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* @offset: offset from epoch in seconds
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*/
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struct pm8xxx_rtc {
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struct rtc_device *rtc;
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struct regmap *regmap;
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bool allow_set_time;
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int alarm_irq;
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const struct pm8xxx_rtc_regs *regs;
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struct device *dev;
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struct nvmem_cell *nvmem_cell;
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u32 offset;
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};
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static int pm8xxx_rtc_read_nvmem_offset(struct pm8xxx_rtc *rtc_dd)
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{
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size_t len;
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void *buf;
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int rc;
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buf = nvmem_cell_read(rtc_dd->nvmem_cell, &len);
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if (IS_ERR(buf)) {
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rc = PTR_ERR(buf);
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dev_dbg(rtc_dd->dev, "failed to read nvmem offset: %d\n", rc);
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return rc;
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}
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if (len != sizeof(u32)) {
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dev_dbg(rtc_dd->dev, "unexpected nvmem cell size %zu\n", len);
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kfree(buf);
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return -EINVAL;
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}
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rtc_dd->offset = get_unaligned_le32(buf);
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kfree(buf);
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return 0;
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}
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static int pm8xxx_rtc_write_nvmem_offset(struct pm8xxx_rtc *rtc_dd, u32 offset)
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{
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u8 buf[sizeof(u32)];
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int rc;
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put_unaligned_le32(offset, buf);
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rc = nvmem_cell_write(rtc_dd->nvmem_cell, buf, sizeof(buf));
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if (rc < 0) {
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dev_dbg(rtc_dd->dev, "failed to write nvmem offset: %d\n", rc);
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return rc;
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}
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return 0;
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}
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static int pm8xxx_rtc_read_offset(struct pm8xxx_rtc *rtc_dd)
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{
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if (!rtc_dd->nvmem_cell)
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return 0;
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return pm8xxx_rtc_read_nvmem_offset(rtc_dd);
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}
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static int pm8xxx_rtc_read_raw(struct pm8xxx_rtc *rtc_dd, u32 *secs)
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{
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const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
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u8 value[NUM_8_BIT_RTC_REGS];
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unsigned int reg;
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int rc;
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rc = regmap_bulk_read(rtc_dd->regmap, regs->read, value, sizeof(value));
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if (rc)
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return rc;
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/*
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* Read the LSB again and check if there has been a carry over.
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* If there has, redo the read operation.
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*/
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rc = regmap_read(rtc_dd->regmap, regs->read, ®);
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if (rc < 0)
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return rc;
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if (reg < value[0]) {
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rc = regmap_bulk_read(rtc_dd->regmap, regs->read, value,
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sizeof(value));
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if (rc)
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return rc;
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}
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*secs = get_unaligned_le32(value);
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return 0;
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}
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static int pm8xxx_rtc_update_offset(struct pm8xxx_rtc *rtc_dd, u32 secs)
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{
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u32 raw_secs;
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u32 offset;
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int rc;
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if (!rtc_dd->nvmem_cell)
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return -ENODEV;
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rc = pm8xxx_rtc_read_raw(rtc_dd, &raw_secs);
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if (rc)
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return rc;
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offset = secs - raw_secs;
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if (offset == rtc_dd->offset)
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return 0;
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rc = pm8xxx_rtc_write_nvmem_offset(rtc_dd, offset);
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if (rc)
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return rc;
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rtc_dd->offset = offset;
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return 0;
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}
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/*
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* Steps to write the RTC registers.
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* 1. Disable alarm if enabled.
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* 2. Disable rtc if enabled.
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* 3. Write 0x00 to LSB.
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* 4. Write Byte[1], Byte[2], Byte[3] then Byte[0].
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* 5. Enable rtc if disabled in step 2.
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* 6. Enable alarm if disabled in step 1.
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*/
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static int __pm8xxx_rtc_set_time(struct pm8xxx_rtc *rtc_dd, u32 secs)
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{
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const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
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u8 value[NUM_8_BIT_RTC_REGS];
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bool alarm_enabled;
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int rc;
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put_unaligned_le32(secs, value);
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rc = regmap_update_bits_check(rtc_dd->regmap, regs->alarm_ctrl,
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regs->alarm_en, 0, &alarm_enabled);
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if (rc)
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return rc;
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/* Disable RTC */
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rc = regmap_update_bits(rtc_dd->regmap, regs->ctrl, PM8xxx_RTC_ENABLE, 0);
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if (rc)
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return rc;
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/* Write 0 to Byte[0] */
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rc = regmap_write(rtc_dd->regmap, regs->write, 0);
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if (rc)
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return rc;
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/* Write Byte[1], Byte[2], Byte[3] */
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rc = regmap_bulk_write(rtc_dd->regmap, regs->write + 1,
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&value[1], sizeof(value) - 1);
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if (rc)
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return rc;
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/* Write Byte[0] */
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rc = regmap_write(rtc_dd->regmap, regs->write, value[0]);
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if (rc)
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return rc;
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/* Enable RTC */
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rc = regmap_update_bits(rtc_dd->regmap, regs->ctrl, PM8xxx_RTC_ENABLE,
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PM8xxx_RTC_ENABLE);
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if (rc)
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return rc;
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if (alarm_enabled) {
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rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl,
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regs->alarm_en, regs->alarm_en);
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if (rc)
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return rc;
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}
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return 0;
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}
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static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
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u32 secs;
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int rc;
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secs = rtc_tm_to_time64(tm);
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if (rtc_dd->allow_set_time)
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rc = __pm8xxx_rtc_set_time(rtc_dd, secs);
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else
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rc = pm8xxx_rtc_update_offset(rtc_dd, secs);
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if (rc)
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return rc;
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dev_dbg(dev, "set time: %ptRd %ptRt (%u + %u)\n", tm, tm,
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secs - rtc_dd->offset, rtc_dd->offset);
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return 0;
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}
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static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
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u32 secs;
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int rc;
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rc = pm8xxx_rtc_read_raw(rtc_dd, &secs);
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if (rc)
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return rc;
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secs += rtc_dd->offset;
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rtc_time64_to_tm(secs, tm);
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dev_dbg(dev, "read time: %ptRd %ptRt (%u + %u)\n", tm, tm,
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secs - rtc_dd->offset, rtc_dd->offset);
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return 0;
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}
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static int pm8xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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{
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struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
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const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
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u8 value[NUM_8_BIT_RTC_REGS];
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u32 secs;
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int rc;
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secs = rtc_tm_to_time64(&alarm->time);
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secs -= rtc_dd->offset;
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put_unaligned_le32(secs, value);
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rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl,
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regs->alarm_en, 0);
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if (rc)
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return rc;
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rc = regmap_bulk_write(rtc_dd->regmap, regs->alarm_rw, value,
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sizeof(value));
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if (rc)
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return rc;
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if (alarm->enabled) {
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rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl,
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regs->alarm_en, regs->alarm_en);
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if (rc)
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return rc;
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}
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dev_dbg(dev, "set alarm: %ptRd %ptRt\n", &alarm->time, &alarm->time);
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return 0;
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}
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static int pm8xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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{
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struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
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const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
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u8 value[NUM_8_BIT_RTC_REGS];
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unsigned int ctrl_reg;
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u32 secs;
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int rc;
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rc = regmap_bulk_read(rtc_dd->regmap, regs->alarm_rw, value,
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sizeof(value));
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if (rc)
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return rc;
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secs = get_unaligned_le32(value);
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secs += rtc_dd->offset;
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rtc_time64_to_tm(secs, &alarm->time);
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rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
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if (rc)
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return rc;
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alarm->enabled = !!(ctrl_reg & PM8xxx_RTC_ALARM_ENABLE);
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dev_dbg(dev, "read alarm: %ptRd %ptRt\n", &alarm->time, &alarm->time);
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return 0;
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}
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static int pm8xxx_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
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{
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struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
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const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
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u8 value[NUM_8_BIT_RTC_REGS] = {0};
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unsigned int val;
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int rc;
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if (enable)
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val = regs->alarm_en;
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else
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val = 0;
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rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl,
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regs->alarm_en, val);
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if (rc)
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return rc;
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/* Clear alarm register */
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if (!enable) {
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rc = regmap_bulk_write(rtc_dd->regmap, regs->alarm_rw, value,
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sizeof(value));
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if (rc)
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return rc;
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}
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return 0;
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}
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static const struct rtc_class_ops pm8xxx_rtc_ops = {
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.read_time = pm8xxx_rtc_read_time,
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.set_time = pm8xxx_rtc_set_time,
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.set_alarm = pm8xxx_rtc_set_alarm,
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.read_alarm = pm8xxx_rtc_read_alarm,
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.alarm_irq_enable = pm8xxx_rtc_alarm_irq_enable,
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};
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static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
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{
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struct pm8xxx_rtc *rtc_dd = dev_id;
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const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
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int rc;
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rtc_update_irq(rtc_dd->rtc, 1, RTC_IRQF | RTC_AF);
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/* Disable alarm */
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rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl,
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regs->alarm_en, 0);
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if (rc)
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return IRQ_NONE;
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/* Clear alarm status */
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rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl2,
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PM8xxx_RTC_ALARM_CLEAR, 0);
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if (rc)
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return IRQ_NONE;
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return IRQ_HANDLED;
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}
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static int pm8xxx_rtc_enable(struct pm8xxx_rtc *rtc_dd)
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{
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const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
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return regmap_update_bits(rtc_dd->regmap, regs->ctrl, PM8xxx_RTC_ENABLE,
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PM8xxx_RTC_ENABLE);
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}
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static const struct pm8xxx_rtc_regs pm8921_regs = {
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.ctrl = 0x11d,
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.write = 0x11f,
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.read = 0x123,
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.alarm_rw = 0x127,
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.alarm_ctrl = 0x11d,
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.alarm_ctrl2 = 0x11e,
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.alarm_en = BIT(1),
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};
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static const struct pm8xxx_rtc_regs pm8058_regs = {
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.ctrl = 0x1e8,
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.write = 0x1ea,
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.read = 0x1ee,
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.alarm_rw = 0x1f2,
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.alarm_ctrl = 0x1e8,
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.alarm_ctrl2 = 0x1e9,
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.alarm_en = BIT(1),
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};
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static const struct pm8xxx_rtc_regs pm8941_regs = {
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.ctrl = 0x6046,
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.write = 0x6040,
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.read = 0x6048,
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.alarm_rw = 0x6140,
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.alarm_ctrl = 0x6146,
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.alarm_ctrl2 = 0x6148,
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.alarm_en = BIT(7),
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};
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static const struct pm8xxx_rtc_regs pmk8350_regs = {
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.ctrl = 0x6146,
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.write = 0x6140,
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.read = 0x6148,
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.alarm_rw = 0x6240,
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.alarm_ctrl = 0x6246,
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.alarm_ctrl2 = 0x6248,
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.alarm_en = BIT(7),
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};
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static const struct of_device_id pm8xxx_id_table[] = {
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{ .compatible = "qcom,pm8921-rtc", .data = &pm8921_regs },
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{ .compatible = "qcom,pm8058-rtc", .data = &pm8058_regs },
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{ .compatible = "qcom,pm8941-rtc", .data = &pm8941_regs },
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{ .compatible = "qcom,pmk8350-rtc", .data = &pmk8350_regs },
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{ },
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};
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MODULE_DEVICE_TABLE(of, pm8xxx_id_table);
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static int pm8xxx_rtc_probe(struct platform_device *pdev)
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{
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const struct of_device_id *match;
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struct pm8xxx_rtc *rtc_dd;
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int rc;
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match = of_match_node(pm8xxx_id_table, pdev->dev.of_node);
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if (!match)
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return -ENXIO;
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rtc_dd = devm_kzalloc(&pdev->dev, sizeof(*rtc_dd), GFP_KERNEL);
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if (rtc_dd == NULL)
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return -ENOMEM;
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rtc_dd->regmap = dev_get_regmap(pdev->dev.parent, NULL);
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if (!rtc_dd->regmap)
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return -ENXIO;
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rtc_dd->alarm_irq = platform_get_irq(pdev, 0);
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if (rtc_dd->alarm_irq < 0)
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return -ENXIO;
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rtc_dd->allow_set_time = of_property_read_bool(pdev->dev.of_node,
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"allow-set-time");
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rtc_dd->nvmem_cell = devm_nvmem_cell_get(&pdev->dev, "offset");
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if (IS_ERR(rtc_dd->nvmem_cell)) {
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rc = PTR_ERR(rtc_dd->nvmem_cell);
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if (rc != -ENOENT)
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return rc;
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rtc_dd->nvmem_cell = NULL;
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}
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rtc_dd->regs = match->data;
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rtc_dd->dev = &pdev->dev;
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if (!rtc_dd->allow_set_time) {
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rc = pm8xxx_rtc_read_offset(rtc_dd);
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if (rc)
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return rc;
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}
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|
|
|
rc = pm8xxx_rtc_enable(rtc_dd);
|
|
if (rc)
|
|
return rc;
|
|
|
|
platform_set_drvdata(pdev, rtc_dd);
|
|
|
|
device_init_wakeup(&pdev->dev, 1);
|
|
|
|
rtc_dd->rtc = devm_rtc_allocate_device(&pdev->dev);
|
|
if (IS_ERR(rtc_dd->rtc))
|
|
return PTR_ERR(rtc_dd->rtc);
|
|
|
|
rtc_dd->rtc->ops = &pm8xxx_rtc_ops;
|
|
rtc_dd->rtc->range_max = U32_MAX;
|
|
|
|
rc = devm_request_any_context_irq(&pdev->dev, rtc_dd->alarm_irq,
|
|
pm8xxx_alarm_trigger,
|
|
IRQF_TRIGGER_RISING,
|
|
"pm8xxx_rtc_alarm", rtc_dd);
|
|
if (rc < 0)
|
|
return rc;
|
|
|
|
rc = devm_rtc_register_device(rtc_dd->rtc);
|
|
if (rc)
|
|
return rc;
|
|
|
|
rc = dev_pm_set_wake_irq(&pdev->dev, rtc_dd->alarm_irq);
|
|
if (rc)
|
|
return rc;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void pm8xxx_remove(struct platform_device *pdev)
|
|
{
|
|
dev_pm_clear_wake_irq(&pdev->dev);
|
|
}
|
|
|
|
static struct platform_driver pm8xxx_rtc_driver = {
|
|
.probe = pm8xxx_rtc_probe,
|
|
.remove_new = pm8xxx_remove,
|
|
.driver = {
|
|
.name = "rtc-pm8xxx",
|
|
.of_match_table = pm8xxx_id_table,
|
|
},
|
|
};
|
|
|
|
module_platform_driver(pm8xxx_rtc_driver);
|
|
|
|
MODULE_ALIAS("platform:rtc-pm8xxx");
|
|
MODULE_DESCRIPTION("PMIC8xxx RTC driver");
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_AUTHOR("Anirudh Ghayal <aghayal@codeaurora.org>");
|
|
MODULE_AUTHOR("Johan Hovold <johan@kernel.org>");
|