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0c17e83fe4
The call to of_get_next_child returns a node pointer with refcount incremented thus it must be explicitly decremented after the last usage. Detected by coccinelle with the following warnings: ./arch/arm/mach-imx/mach-imx51.c:64:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 57, but without a corresponding object release within this function. Signed-off-by: Wen Yang <wen.yang99@zte.com.cn> Cc: Russell King <linux@armlinux.org.uk> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
105 lines
2.5 KiB
C
105 lines
2.5 KiB
C
/*
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* Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include "common.h"
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#include "hardware.h"
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static void __init imx51_init_early(void)
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{
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mxc_set_cpu_type(MXC_CPU_MX51);
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}
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/*
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* The MIPI HSC unit has been removed from the i.MX51 Reference Manual by
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* the Freescale marketing division. However this did not remove the
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* hardware from the chip which still needs to be configured for proper
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* IPU support.
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*/
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#define MX51_MIPI_HSC_BASE 0x83fdc000
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static void __init imx51_ipu_mipi_setup(void)
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{
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void __iomem *hsc_addr;
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hsc_addr = ioremap(MX51_MIPI_HSC_BASE, SZ_16K);
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WARN_ON(!hsc_addr);
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/* setup MIPI module to legacy mode */
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imx_writel(0xf00, hsc_addr);
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/* CSI mode: reserved; DI control mode: legacy (from Freescale BSP) */
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imx_writel(imx_readl(hsc_addr + 0x800) | 0x30ff, hsc_addr + 0x800);
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iounmap(hsc_addr);
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}
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static void __init imx51_m4if_setup(void)
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{
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void __iomem *m4if_base;
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struct device_node *np;
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np = of_find_compatible_node(NULL, NULL, "fsl,imx51-m4if");
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if (!np)
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return;
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m4if_base = of_iomap(np, 0);
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of_node_put(np);
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if (!m4if_base) {
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pr_err("Unable to map M4IF registers\n");
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return;
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}
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/*
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* Configure VPU and IPU with higher priorities
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* in order to avoid artifacts during video playback
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*/
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writel_relaxed(0x00000203, m4if_base + 0x40);
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writel_relaxed(0x00000000, m4if_base + 0x44);
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writel_relaxed(0x00120125, m4if_base + 0x9c);
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writel_relaxed(0x001901A3, m4if_base + 0x48);
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iounmap(m4if_base);
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}
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static void __init imx51_dt_init(void)
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{
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imx51_ipu_mipi_setup();
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imx_src_init();
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imx51_m4if_setup();
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imx5_pmu_init();
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imx_aips_allow_unprivileged_access("fsl,imx51-aipstz");
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}
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static void __init imx51_init_late(void)
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{
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mx51_neon_fixup();
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imx51_pm_init();
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}
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static const char * const imx51_dt_board_compat[] __initconst = {
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"fsl,imx51",
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NULL
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};
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DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)")
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.init_early = imx51_init_early,
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.init_machine = imx51_dt_init,
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.init_late = imx51_init_late,
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.dt_compat = imx51_dt_board_compat,
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MACHINE_END
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