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a048a07d7f
On some CPUs we can prevent a vulnerability related to store-to-load forwarding by preventing store forwarding between privilege domains, by inserting a barrier in kernel entry and exit paths. This is known to be the case on at least Power7, Power8 and Power9 powerpc CPUs. Barriers must be inserted generally before the first load after moving to a higher privilege, and after the last store before moving to a lower privilege, HV and PR privilege transitions must be protected. Barriers are added as patch sections, with all kernel/hypervisor entry points patched, and the exit points to lower privilge levels patched similarly to the RFI flush patching. Firmware advertisement is not implemented yet, so CPU flush types are hard coded. Thanks to Michal Suchánek for bug fixes and review. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Mauricio Faria de Oliveira <mauricfo@linux.vnet.ibm.com> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Michal Suchánek <msuchanek@suse.de> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
372 lines
8.0 KiB
ArmAsm
372 lines
8.0 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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#ifdef CONFIG_PPC64
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#define PROVIDE32(x) PROVIDE(__unused__##x)
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#else
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#define PROVIDE32(x) PROVIDE(x)
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#endif
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#include <asm/page.h>
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#include <asm-generic/vmlinux.lds.h>
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#include <asm/cache.h>
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#include <asm/thread_info.h>
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#if defined(CONFIG_STRICT_KERNEL_RWX) && !defined(CONFIG_PPC32)
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#define STRICT_ALIGN_SIZE (1 << 24)
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#else
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#define STRICT_ALIGN_SIZE PAGE_SIZE
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#endif
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ENTRY(_stext)
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PHDRS {
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kernel PT_LOAD FLAGS(7); /* RWX */
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notes PT_NOTE FLAGS(0);
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dummy PT_NOTE FLAGS(0);
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/* binutils < 2.18 has a bug that makes it misbehave when taking an
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ELF file with all segments at load address 0 as input. This
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happens when running "strip" on vmlinux, because of the AT() magic
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in this linker script. People using GCC >= 4.2 won't run into
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this problem, because the "build-id" support will put some data
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into the "notes" segment (at a non-zero load address).
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To work around this, we force some data into both the "dummy"
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segment and the kernel segment, so the dummy segment will get a
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non-zero load address. It's not enough to always create the
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"notes" segment, since if nothing gets assigned to it, its load
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address will be zero. */
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}
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#ifdef CONFIG_PPC64
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OUTPUT_ARCH(powerpc:common64)
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jiffies = jiffies_64;
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#else
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OUTPUT_ARCH(powerpc:common)
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jiffies = jiffies_64 + 4;
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#endif
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SECTIONS
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{
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. = KERNELBASE;
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/*
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* Text, read only data and other permanent read-only sections
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*/
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_text = .;
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_stext = .;
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/*
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* Head text.
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* This needs to be in its own output section to avoid ld placing
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* branch trampoline stubs randomly throughout the fixed sections,
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* which it will do (even if the branch comes from another section)
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* in order to optimize stub generation.
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*/
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.head.text : AT(ADDR(.head.text) - LOAD_OFFSET) {
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#ifdef CONFIG_PPC64
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KEEP(*(.head.text.first_256B));
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#ifdef CONFIG_PPC_BOOK3E
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#else
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KEEP(*(.head.text.real_vectors));
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*(.head.text.real_trampolines);
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KEEP(*(.head.text.virt_vectors));
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*(.head.text.virt_trampolines);
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# if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
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KEEP(*(.head.data.fwnmi_page));
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# endif
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#endif
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#else /* !CONFIG_PPC64 */
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HEAD_TEXT
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#endif
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} :kernel
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__head_end = .;
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#ifdef CONFIG_PPC64
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/*
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* BLOCK(0) overrides the default output section alignment because
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* this needs to start right after .head.text in order for fixed
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* section placement to work.
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*/
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.text BLOCK(0) : AT(ADDR(.text) - LOAD_OFFSET) {
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#ifdef CONFIG_LD_HEAD_STUB_CATCH
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*(.linker_stub_catch);
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. = . ;
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#endif
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#else
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.text : AT(ADDR(.text) - LOAD_OFFSET) {
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ALIGN_FUNCTION();
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#endif
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/* careful! __ftr_alt_* sections need to be close to .text */
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*(.text.hot .text .text.fixup .text.unlikely .fixup __ftr_alt_* .ref.text);
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SCHED_TEXT
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CPUIDLE_TEXT
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LOCK_TEXT
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KPROBES_TEXT
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IRQENTRY_TEXT
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SOFTIRQENTRY_TEXT
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/*
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* -Os builds call FP save/restore functions. The powerpc64
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* linker generates those on demand in the .sfpr section.
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* .sfpr gets placed at the beginning of a group of input
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* sections, which can break start-of-text offset if it is
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* included with the main text sections, so put it by itself.
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*/
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*(.sfpr);
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MEM_KEEP(init.text)
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MEM_KEEP(exit.text)
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#ifdef CONFIG_PPC32
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*(.got1)
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__got2_start = .;
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*(.got2)
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__got2_end = .;
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#endif /* CONFIG_PPC32 */
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} :kernel
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. = ALIGN(PAGE_SIZE);
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_etext = .;
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PROVIDE32 (etext = .);
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/* Read-only data */
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RO_DATA(PAGE_SIZE)
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#ifdef CONFIG_PPC64
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. = ALIGN(8);
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__stf_entry_barrier_fixup : AT(ADDR(__stf_entry_barrier_fixup) - LOAD_OFFSET) {
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__start___stf_entry_barrier_fixup = .;
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*(__stf_entry_barrier_fixup)
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__stop___stf_entry_barrier_fixup = .;
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}
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. = ALIGN(8);
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__stf_exit_barrier_fixup : AT(ADDR(__stf_exit_barrier_fixup) - LOAD_OFFSET) {
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__start___stf_exit_barrier_fixup = .;
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*(__stf_exit_barrier_fixup)
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__stop___stf_exit_barrier_fixup = .;
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}
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. = ALIGN(8);
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__rfi_flush_fixup : AT(ADDR(__rfi_flush_fixup) - LOAD_OFFSET) {
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__start___rfi_flush_fixup = .;
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*(__rfi_flush_fixup)
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__stop___rfi_flush_fixup = .;
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}
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#endif
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EXCEPTION_TABLE(0)
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NOTES :kernel :notes
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/* The dummy segment contents for the bug workaround mentioned above
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near PHDRS. */
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.dummy : AT(ADDR(.dummy) - LOAD_OFFSET) {
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LONG(0)
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LONG(0)
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LONG(0)
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} :kernel :dummy
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/*
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* Init sections discarded at runtime
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*/
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. = ALIGN(STRICT_ALIGN_SIZE);
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__init_begin = .;
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INIT_TEXT_SECTION(PAGE_SIZE) :kernel
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/* .exit.text is discarded at runtime, not link time,
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* to deal with references from __bug_table
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*/
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.exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) {
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EXIT_TEXT
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}
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.init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
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INIT_DATA
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__vtop_table_begin = .;
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*(.vtop_fixup);
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__vtop_table_end = .;
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__ptov_table_begin = .;
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*(.ptov_fixup);
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__ptov_table_end = .;
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}
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.init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) {
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INIT_SETUP(16)
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}
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.initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET) {
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INIT_CALLS
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}
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.con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) {
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CON_INITCALL
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}
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SECURITY_INIT
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. = ALIGN(8);
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__ftr_fixup : AT(ADDR(__ftr_fixup) - LOAD_OFFSET) {
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__start___ftr_fixup = .;
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*(__ftr_fixup)
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__stop___ftr_fixup = .;
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}
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. = ALIGN(8);
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__mmu_ftr_fixup : AT(ADDR(__mmu_ftr_fixup) - LOAD_OFFSET) {
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__start___mmu_ftr_fixup = .;
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*(__mmu_ftr_fixup)
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__stop___mmu_ftr_fixup = .;
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}
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. = ALIGN(8);
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__lwsync_fixup : AT(ADDR(__lwsync_fixup) - LOAD_OFFSET) {
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__start___lwsync_fixup = .;
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*(__lwsync_fixup)
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__stop___lwsync_fixup = .;
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}
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#ifdef CONFIG_PPC64
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. = ALIGN(8);
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__fw_ftr_fixup : AT(ADDR(__fw_ftr_fixup) - LOAD_OFFSET) {
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__start___fw_ftr_fixup = .;
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*(__fw_ftr_fixup)
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__stop___fw_ftr_fixup = .;
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}
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#endif
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.init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) {
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INIT_RAM_FS
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}
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PERCPU_SECTION(L1_CACHE_BYTES)
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. = ALIGN(8);
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.machine.desc : AT(ADDR(.machine.desc) - LOAD_OFFSET) {
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__machine_desc_start = . ;
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*(.machine.desc)
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__machine_desc_end = . ;
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}
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#ifdef CONFIG_RELOCATABLE
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. = ALIGN(8);
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.dynsym : AT(ADDR(.dynsym) - LOAD_OFFSET)
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{
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#ifdef CONFIG_PPC32
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__dynamic_symtab = .;
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#endif
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*(.dynsym)
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}
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.dynstr : AT(ADDR(.dynstr) - LOAD_OFFSET) { *(.dynstr) }
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.dynamic : AT(ADDR(.dynamic) - LOAD_OFFSET)
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{
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__dynamic_start = .;
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*(.dynamic)
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}
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.hash : AT(ADDR(.hash) - LOAD_OFFSET) { *(.hash) }
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.interp : AT(ADDR(.interp) - LOAD_OFFSET) { *(.interp) }
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.rela.dyn : AT(ADDR(.rela.dyn) - LOAD_OFFSET)
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{
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__rela_dyn_start = .;
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*(.rela*)
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}
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#endif
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/* .exit.data is discarded at runtime, not link time,
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* to deal with references from .exit.text
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*/
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.exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
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EXIT_DATA
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}
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/* freed after init ends here */
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. = ALIGN(PAGE_SIZE);
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__init_end = .;
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/*
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* And now the various read/write data
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*/
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. = ALIGN(PAGE_SIZE);
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_sdata = .;
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#ifdef CONFIG_PPC32
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.data : AT(ADDR(.data) - LOAD_OFFSET) {
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DATA_DATA
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*(.data.rel*)
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*(.sdata)
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*(.sdata2)
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*(.got.plt) *(.got)
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*(.plt)
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}
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#else
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.data : AT(ADDR(.data) - LOAD_OFFSET) {
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DATA_DATA
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*(.data.rel*)
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*(.toc1)
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*(.branch_lt)
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}
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.opd : AT(ADDR(.opd) - LOAD_OFFSET) {
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__start_opd = .;
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*(.opd)
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__end_opd = .;
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}
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. = ALIGN(256);
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.got : AT(ADDR(.got) - LOAD_OFFSET) {
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__toc_start = .;
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#ifndef CONFIG_RELOCATABLE
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__prom_init_toc_start = .;
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arch/powerpc/kernel/prom_init.o*(.toc .got)
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__prom_init_toc_end = .;
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#endif
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*(.got)
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*(.toc)
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}
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#endif
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/* The initial task and kernel stack */
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INIT_TASK_DATA_SECTION(THREAD_SIZE)
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.data..page_aligned : AT(ADDR(.data..page_aligned) - LOAD_OFFSET) {
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PAGE_ALIGNED_DATA(PAGE_SIZE)
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}
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.data..cacheline_aligned : AT(ADDR(.data..cacheline_aligned) - LOAD_OFFSET) {
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CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
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}
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.data..read_mostly : AT(ADDR(.data..read_mostly) - LOAD_OFFSET) {
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READ_MOSTLY_DATA(L1_CACHE_BYTES)
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}
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. = ALIGN(PAGE_SIZE);
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.data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
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NOSAVE_DATA
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}
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BUG_TABLE
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. = ALIGN(PAGE_SIZE);
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_edata = .;
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PROVIDE32 (edata = .);
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/*
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* And finally the bss
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*/
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BSS_SECTION(0, 0, 0)
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. = ALIGN(PAGE_SIZE);
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_end = . ;
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PROVIDE32 (end = .);
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STABS_DEBUG
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DWARF_DEBUG
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DISCARDS
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/DISCARD/ : {
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*(*.EMB.apuinfo)
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*(.glink .iplt .plt .rela* .comment)
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*(.gnu.version*)
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*(.gnu.attributes)
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*(.eh_frame)
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}
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}
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