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Set the reserved bit 7 in the ANALOG_CTRL_REG for the TAS5720A-Q1 device, when probing. The datasheet mentions that the bit should be 1 during reset/powerup. The device did not initialize before setting this value to 1. So, this could be a quirk of this device. Or it could be a quirk with the board on which it was tested. That is why this patch is separate from the patch that adds support for the TAS5720A-Q1 device. Signed-off-by: Steffen Aschbacher <steffen.aschbacher@stihl.de> Signed-off-by: Alexandru Ardelean <alex@shruggie.ro> Link: https://lore.kernel.org/r/20230128082744.41849-3-alex@shruggie.ro Signed-off-by: Mark Brown <broonie@kernel.org>
128 lines
4.2 KiB
C
128 lines
4.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* tas5720.h - ALSA SoC Texas Instruments TAS5720 Mono Audio Amplifier
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*
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* Copyright (C)2015-2016 Texas Instruments Incorporated - https://www.ti.com
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*
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* Author: Andreas Dannenberg <dannenberg@ti.com>
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*/
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#ifndef __TAS5720_H__
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#define __TAS5720_H__
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/* Register Address Map - first 3 regs are common for all variants */
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#define TAS5720_DEVICE_ID_REG 0x00
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#define TAS5720_POWER_CTRL_REG 0x01
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#define TAS5720_DIGITAL_CTRL1_REG 0x02
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#define TAS5720_DIGITAL_CTRL2_REG 0x03
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#define TAS5720_VOLUME_CTRL_REG 0x04
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#define TAS5720_ANALOG_CTRL_REG 0x06
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#define TAS5720_FAULT_REG 0x08
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#define TAS5720_DIGITAL_CLIP2_REG 0x10
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#define TAS5720_DIGITAL_CLIP1_REG 0x11
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#define TAS5720_MAX_REG TAS5720_DIGITAL_CLIP1_REG
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/* Additional TAS5722-specific Registers */
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#define TAS5722_DIGITAL_CTRL2_REG 0x13
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#define TAS5722_ANALOG_CTRL2_REG 0x14
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#define TAS5722_MAX_REG TAS5722_ANALOG_CTRL2_REG
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/* Register Address Map - volume controls for the TAS5720-Q1 variant */
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#define TAS5720_Q1_VOLUME_CTRL_CFG_REG 0x03
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#define TAS5720_Q1_VOLUME_CTRL_LEFT_REG 0x04
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#define TAS5720_Q1_VOLUME_CTRL_RIGHT_REG 0x05
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/* TAS5720_DEVICE_ID_REG */
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#define TAS5720A_Q1_DEVICE_ID 0x00
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#define TAS5720_DEVICE_ID 0x01
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#define TAS5722_DEVICE_ID 0x12
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/* TAS5720_POWER_CTRL_REG */
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#define TAS5720_DIG_CLIP_MASK GENMASK(7, 2)
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#define TAS5720_SLEEP BIT(1)
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#define TAS5720_SDZ BIT(0)
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/* TAS5720_DIGITAL_CTRL1_REG */
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#define TAS5720_HPF_BYPASS BIT(7)
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#define TAS5720_TDM_CFG_SRC BIT(6)
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#define TAS5720_SSZ_DS BIT(3)
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#define TAS5720_SAIF_RIGHTJ_24BIT (0x0)
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#define TAS5720_SAIF_RIGHTJ_20BIT (0x1)
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#define TAS5720_SAIF_RIGHTJ_18BIT (0x2)
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#define TAS5720_SAIF_RIGHTJ_16BIT (0x3)
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#define TAS5720_SAIF_I2S (0x4)
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#define TAS5720_SAIF_LEFTJ (0x5)
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#define TAS5720_SAIF_FORMAT_MASK GENMASK(2, 0)
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/* TAS5720_DIGITAL_CTRL2_REG */
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#define TAS5722_VOL_RAMP_RATE BIT(6)
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#define TAS5720_MUTE BIT(4)
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#define TAS5720_TDM_SLOT_SEL_MASK GENMASK(2, 0)
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/* TAS5720_Q1_VOLUME_CTRL_CFG_REG */
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#define TAS5720_Q1_FADE BIT(7)
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#define TAS5720_Q1_MUTE GENMASK(1, 0)
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/* TAS5720_ANALOG_CTRL_REG */
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#define TAS5720_PWM_RATE_6_3_FSYNC (0x0 << 4)
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#define TAS5720_PWM_RATE_8_4_FSYNC (0x1 << 4)
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#define TAS5720_PWM_RATE_10_5_FSYNC (0x2 << 4)
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#define TAS5720_PWM_RATE_12_6_FSYNC (0x3 << 4)
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#define TAS5720_PWM_RATE_14_7_FSYNC (0x4 << 4)
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#define TAS5720_PWM_RATE_16_8_FSYNC (0x5 << 4)
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#define TAS5720_PWM_RATE_20_10_FSYNC (0x6 << 4)
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#define TAS5720_PWM_RATE_24_12_FSYNC (0x7 << 4)
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#define TAS5720_PWM_RATE_MASK GENMASK(6, 4)
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#define TAS5720_ANALOG_GAIN_19_2DBV (0x0 << 2)
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#define TAS5720_ANALOG_GAIN_20_7DBV (0x1 << 2)
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#define TAS5720_ANALOG_GAIN_23_5DBV (0x2 << 2)
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#define TAS5720_ANALOG_GAIN_26_3DBV (0x3 << 2)
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#define TAS5720_ANALOG_GAIN_MASK GENMASK(3, 2)
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#define TAS5720_ANALOG_GAIN_SHIFT (0x2)
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/* TAS5720_Q1_ANALOG_CTRL_REG */
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#define TAS5720_Q1_RESERVED7_BIT BIT(7)
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#define TAS5720_Q1_CHAN_SEL BIT(1)
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/* TAS5720_FAULT_REG */
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#define TAS5720_OC_THRESH_100PCT (0x0 << 4)
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#define TAS5720_OC_THRESH_75PCT (0x1 << 4)
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#define TAS5720_OC_THRESH_50PCT (0x2 << 4)
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#define TAS5720_OC_THRESH_25PCT (0x3 << 4)
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#define TAS5720_OC_THRESH_MASK GENMASK(5, 4)
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#define TAS5720_CLKE BIT(3)
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#define TAS5720_OCE BIT(2)
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#define TAS5720_DCE BIT(1)
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#define TAS5720_OTE BIT(0)
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#define TAS5720_FAULT_MASK GENMASK(3, 0)
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/* TAS5720_DIGITAL_CLIP1_REG */
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#define TAS5720_CLIP1_MASK GENMASK(7, 2)
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#define TAS5720_CLIP1_SHIFT (0x2)
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/* TAS5722_DIGITAL_CTRL2_REG */
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#define TAS5722_HPF_3_7HZ (0x0 << 5)
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#define TAS5722_HPF_7_4HZ (0x1 << 5)
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#define TAS5722_HPF_14_9HZ (0x2 << 5)
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#define TAS5722_HPF_29_7HZ (0x3 << 5)
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#define TAS5722_HPF_59_4HZ (0x4 << 5)
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#define TAS5722_HPF_118_4HZ (0x5 << 5)
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#define TAS5722_HPF_235_0HZ (0x6 << 5)
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#define TAS5722_HPF_463_2HZ (0x7 << 5)
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#define TAS5722_HPF_MASK GENMASK(7, 5)
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#define TAS5722_AUTO_SLEEP_OFF (0x0 << 3)
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#define TAS5722_AUTO_SLEEP_1024LR (0x1 << 3)
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#define TAS5722_AUTO_SLEEP_65536LR (0x2 << 3)
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#define TAS5722_AUTO_SLEEP_262144LR (0x3 << 3)
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#define TAS5722_AUTO_SLEEP_MASK GENMASK(4, 3)
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#define TAS5722_TDM_SLOT_16B BIT(2)
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#define TAS5722_MCLK_PIN_CFG BIT(1)
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#define TAS5722_VOL_CONTROL_LSB BIT(0)
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/* TAS5722_ANALOG_CTRL2_REG */
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#define TAS5722_FAULTZ_PU BIT(3)
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#define TAS5722_VREG_LVL BIT(2)
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#define TAS5722_PWR_TUNE BIT(0)
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#endif /* __TAS5720_H__ */
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