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869acb874f
The use of for_each_child_of_node_scoped() has been spread into the subsystem drivers. Aside from that, a couple of exit path have been fixed (mtk, denali), the TI GPMC bindings have been enhanced to comply with up-to-date partition descriptions and as always there is a load of small and misc fixes. * SPI-NAND changes The most impacting series this cycle is bringing support for continuous reads in the SPI-NAND subsystem. This is a feature already merged in the raw NAND subsystem which allows optimizing the internal fetch times in the chip while reading sequential pages within an eraseblock. For now only Macronix NANDs benefit from this feature. While we are talking about Macronix, some of their chip need an explicit action for selecting a different plane, and support for it has also been brought. The bitflip threshold has also been set to the same arbitrary level as in the raw NAND subsystem to optimize wear leveling decisions, and finally support for a new Winbond chip has been added. -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEE9HuaYnbmDhq/XIDIJWrqGEe9VoQFAmbkfEYACgkQJWrqGEe9 VoT9TAgAsJZeCITvQfCBcaBScr8O86eqynvwkkfltdK8kcdCtH7P3gR9XvMmOOq8 QY8Ru072ufTj0dwT+YnWlRZ0jopK2Kd8JB41jYm4pP3euSUyIm+gf5d7AbHoWlLm J6HfvnDNzEO0Fixpj3hqFKCDr1Xt0jWzVLh/ZyNa+0co/oJi0w0lnWxIs/iCgBQ2 sSosVhc0X0kt7RhV8RFvyIu3i9k3MFzKYt6hP07PpAVxlshvWHLOnU27FiIhGioz UGwasbZ2XLbOZhcGaK9Q+cCrMZn52zJI8inlLKBFizU1+eUz4Q1kCVnx0OiPz7uW 7NyiiOUjPpJCrkKpWZbUnV3C2lZQOg== =Xg6Q -----END PGP SIGNATURE----- Merge tag 'nand/for-6.12' into mtd/next * Raw NAND changes The use of for_each_child_of_node_scoped() has been spread into the subsystem drivers. Aside from that, a couple of exit path have been fixed (mtk, denali), the TI GPMC bindings have been enhanced to comply with up-to-date partition descriptions and as always there is a load of small and misc fixes. * SPI-NAND changes The most impacting series this cycle is bringing support for continuous reads in the SPI-NAND subsystem. This is a feature already merged in the raw NAND subsystem which allows optimizing the internal fetch times in the chip while reading sequential pages within an eraseblock. For now only Macronix NANDs benefit from this feature. While we are talking about Macronix, some of their chip need an explicit action for selecting a different plane, and support for it has also been brought. The bitflip threshold has also been set to the same arbitrary level as in the raw NAND subsystem to optimize wear leveling decisions, and finally support for a new Winbond chip has been added. |
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.. | ||
chips | ||
devices | ||
hyperbus | ||
lpddr | ||
maps | ||
nand | ||
parsers | ||
spi-nor | ||
tests | ||
ubi | ||
ftl.c | ||
inftlcore.c | ||
inftlmount.c | ||
Kconfig | ||
Makefile | ||
mtd_blkdevs.c | ||
mtdblock_ro.c | ||
mtdblock.c | ||
mtdchar.c | ||
mtdconcat.c | ||
mtdcore.c | ||
mtdcore.h | ||
mtdoops.c | ||
mtdpart.c | ||
mtdpstore.c | ||
mtdsuper.c | ||
mtdswap.c | ||
nftlcore.c | ||
nftlmount.c | ||
rfd_ftl.c | ||
sm_ftl.c | ||
sm_ftl.h | ||
ssfdc.c |