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4cf381bf8e
Use devm version of gpiochip_add() function to handle removal for us. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
450 lines
11 KiB
C
450 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* GPIO driver for the SMSC SCH311x Super-I/O chips
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*
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* Copyright (C) 2013 Bruno Randolf <br1@einfach.org>
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*
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* SuperIO functions and chip detection:
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* (c) Copyright 2008 Wim Van Sebroeck <wim@iguana.be>.
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*/
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#include <linux/ioport.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/gpio/driver.h>
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#include <linux/bitops.h>
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#include <linux/io.h>
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#define DRV_NAME "gpio-sch311x"
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#define SCH311X_GPIO_CONF_DIR BIT(0)
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#define SCH311X_GPIO_CONF_INVERT BIT(1)
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#define SCH311X_GPIO_CONF_OPEN_DRAIN BIT(7)
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#define SIO_CONFIG_KEY_ENTER 0x55
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#define SIO_CONFIG_KEY_EXIT 0xaa
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#define GP1 0x4b
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static int sch311x_ioports[] = { 0x2e, 0x4e, 0x162e, 0x164e };
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static struct platform_device *sch311x_gpio_pdev;
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struct sch311x_pdev_data { /* platform device data */
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unsigned short runtime_reg; /* runtime register base address */
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};
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struct sch311x_gpio_block { /* one GPIO block runtime data */
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struct gpio_chip chip;
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unsigned short data_reg; /* from definition below */
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unsigned short *config_regs; /* pointer to definition below */
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unsigned short runtime_reg; /* runtime register */
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spinlock_t lock; /* lock for this GPIO block */
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};
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struct sch311x_gpio_priv { /* driver private data */
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struct sch311x_gpio_block blocks[6];
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};
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struct sch311x_gpio_block_def { /* register address definitions */
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unsigned short data_reg;
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unsigned short config_regs[8];
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unsigned short base;
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};
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/* Note: some GPIOs are not available, these are marked with 0x00 */
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static struct sch311x_gpio_block_def sch311x_gpio_blocks[] = {
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{
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.data_reg = 0x4b, /* GP1 */
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.config_regs = {0x23, 0x24, 0x25, 0x26, 0x27, 0x29, 0x2a, 0x2b},
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.base = 10,
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},
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{
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.data_reg = 0x4c, /* GP2 */
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.config_regs = {0x00, 0x2c, 0x2d, 0x00, 0x00, 0x00, 0x00, 0x32},
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.base = 20,
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},
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{
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.data_reg = 0x4d, /* GP3 */
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.config_regs = {0x33, 0x34, 0x35, 0x36, 0x37, 0x00, 0x39, 0x3a},
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.base = 30,
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},
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{
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.data_reg = 0x4e, /* GP4 */
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.config_regs = {0x3b, 0x00, 0x3d, 0x00, 0x6e, 0x6f, 0x72, 0x73},
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.base = 40,
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},
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{
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.data_reg = 0x4f, /* GP5 */
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.config_regs = {0x3f, 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46},
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.base = 50,
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},
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{
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.data_reg = 0x50, /* GP6 */
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.config_regs = {0x47, 0x48, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59},
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.base = 60,
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},
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};
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/*
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* Super-IO functions
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*/
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static inline int sch311x_sio_enter(int sio_config_port)
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{
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/* Don't step on other drivers' I/O space by accident. */
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if (!request_muxed_region(sio_config_port, 2, DRV_NAME)) {
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pr_err(DRV_NAME "I/O address 0x%04x already in use\n",
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sio_config_port);
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return -EBUSY;
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}
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outb(SIO_CONFIG_KEY_ENTER, sio_config_port);
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return 0;
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}
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static inline void sch311x_sio_exit(int sio_config_port)
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{
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outb(SIO_CONFIG_KEY_EXIT, sio_config_port);
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release_region(sio_config_port, 2);
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}
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static inline int sch311x_sio_inb(int sio_config_port, int reg)
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{
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outb(reg, sio_config_port);
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return inb(sio_config_port + 1);
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}
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static inline void sch311x_sio_outb(int sio_config_port, int reg, int val)
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{
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outb(reg, sio_config_port);
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outb(val, sio_config_port + 1);
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}
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/*
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* GPIO functions
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*/
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static int sch311x_gpio_request(struct gpio_chip *chip, unsigned offset)
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{
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struct sch311x_gpio_block *block = gpiochip_get_data(chip);
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if (block->config_regs[offset] == 0) /* GPIO is not available */
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return -ENODEV;
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if (!request_region(block->runtime_reg + block->config_regs[offset],
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1, DRV_NAME)) {
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dev_err(chip->parent, "Failed to request region 0x%04x.\n",
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block->runtime_reg + block->config_regs[offset]);
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return -EBUSY;
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}
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return 0;
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}
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static void sch311x_gpio_free(struct gpio_chip *chip, unsigned offset)
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{
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struct sch311x_gpio_block *block = gpiochip_get_data(chip);
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if (block->config_regs[offset] == 0) /* GPIO is not available */
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return;
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release_region(block->runtime_reg + block->config_regs[offset], 1);
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}
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static int sch311x_gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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struct sch311x_gpio_block *block = gpiochip_get_data(chip);
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u8 data;
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spin_lock(&block->lock);
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data = inb(block->runtime_reg + block->data_reg);
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spin_unlock(&block->lock);
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return !!(data & BIT(offset));
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}
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static void __sch311x_gpio_set(struct sch311x_gpio_block *block,
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unsigned offset, int value)
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{
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u8 data = inb(block->runtime_reg + block->data_reg);
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if (value)
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data |= BIT(offset);
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else
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data &= ~BIT(offset);
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outb(data, block->runtime_reg + block->data_reg);
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}
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static void sch311x_gpio_set(struct gpio_chip *chip, unsigned offset,
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int value)
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{
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struct sch311x_gpio_block *block = gpiochip_get_data(chip);
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spin_lock(&block->lock);
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__sch311x_gpio_set(block, offset, value);
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spin_unlock(&block->lock);
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}
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static int sch311x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
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{
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struct sch311x_gpio_block *block = gpiochip_get_data(chip);
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u8 data;
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spin_lock(&block->lock);
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data = inb(block->runtime_reg + block->config_regs[offset]);
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data |= SCH311X_GPIO_CONF_DIR;
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outb(data, block->runtime_reg + block->config_regs[offset]);
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spin_unlock(&block->lock);
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return 0;
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}
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static int sch311x_gpio_direction_out(struct gpio_chip *chip, unsigned offset,
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int value)
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{
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struct sch311x_gpio_block *block = gpiochip_get_data(chip);
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u8 data;
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spin_lock(&block->lock);
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data = inb(block->runtime_reg + block->config_regs[offset]);
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data &= ~SCH311X_GPIO_CONF_DIR;
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outb(data, block->runtime_reg + block->config_regs[offset]);
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__sch311x_gpio_set(block, offset, value);
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spin_unlock(&block->lock);
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return 0;
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}
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static int sch311x_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
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{
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struct sch311x_gpio_block *block = gpiochip_get_data(chip);
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u8 data;
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spin_lock(&block->lock);
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data = inb(block->runtime_reg + block->config_regs[offset]);
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spin_unlock(&block->lock);
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if (data & SCH311X_GPIO_CONF_DIR)
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return GPIO_LINE_DIRECTION_IN;
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return GPIO_LINE_DIRECTION_OUT;
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}
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static int sch311x_gpio_set_config(struct gpio_chip *chip, unsigned offset,
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unsigned long config)
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{
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struct sch311x_gpio_block *block = gpiochip_get_data(chip);
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enum pin_config_param param = pinconf_to_config_param(config);
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u8 data;
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switch (param) {
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case PIN_CONFIG_DRIVE_OPEN_DRAIN:
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spin_lock(&block->lock);
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data = inb(block->runtime_reg + block->config_regs[offset]);
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data |= SCH311X_GPIO_CONF_OPEN_DRAIN;
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outb(data, block->runtime_reg + block->config_regs[offset]);
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spin_unlock(&block->lock);
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return 0;
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case PIN_CONFIG_DRIVE_PUSH_PULL:
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spin_lock(&block->lock);
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data = inb(block->runtime_reg + block->config_regs[offset]);
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data &= ~SCH311X_GPIO_CONF_OPEN_DRAIN;
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outb(data, block->runtime_reg + block->config_regs[offset]);
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spin_unlock(&block->lock);
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return 0;
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default:
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break;
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}
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return -ENOTSUPP;
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}
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static int sch311x_gpio_probe(struct platform_device *pdev)
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{
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struct sch311x_pdev_data *pdata = dev_get_platdata(&pdev->dev);
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struct sch311x_gpio_priv *priv;
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struct sch311x_gpio_block *block;
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int err, i;
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/* we can register all GPIO data registers at once */
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if (!devm_request_region(&pdev->dev, pdata->runtime_reg + GP1, 6,
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DRV_NAME)) {
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dev_err(&pdev->dev, "Failed to request region 0x%04x-0x%04x.\n",
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pdata->runtime_reg + GP1, pdata->runtime_reg + GP1 + 5);
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return -EBUSY;
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}
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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for (i = 0; i < ARRAY_SIZE(priv->blocks); i++) {
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block = &priv->blocks[i];
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spin_lock_init(&block->lock);
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block->chip.label = DRV_NAME;
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block->chip.owner = THIS_MODULE;
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block->chip.request = sch311x_gpio_request;
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block->chip.free = sch311x_gpio_free;
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block->chip.direction_input = sch311x_gpio_direction_in;
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block->chip.direction_output = sch311x_gpio_direction_out;
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block->chip.get_direction = sch311x_gpio_get_direction;
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block->chip.set_config = sch311x_gpio_set_config;
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block->chip.get = sch311x_gpio_get;
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block->chip.set = sch311x_gpio_set;
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block->chip.ngpio = 8;
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block->chip.parent = &pdev->dev;
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block->chip.base = sch311x_gpio_blocks[i].base;
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block->config_regs = sch311x_gpio_blocks[i].config_regs;
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block->data_reg = sch311x_gpio_blocks[i].data_reg;
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block->runtime_reg = pdata->runtime_reg;
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err = devm_gpiochip_add_data(&pdev->dev, &block->chip, block);
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if (err < 0) {
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dev_err(&pdev->dev,
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"Could not register gpiochip, %d\n", err);
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return err;
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}
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dev_info(&pdev->dev,
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"SMSC SCH311x GPIO block %d registered.\n", i);
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}
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return 0;
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}
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static struct platform_driver sch311x_gpio_driver = {
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.driver.name = DRV_NAME,
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.probe = sch311x_gpio_probe,
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};
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/*
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* Init & exit routines
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*/
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static int __init sch311x_detect(int sio_config_port, unsigned short *addr)
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{
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int err = 0, reg;
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unsigned short base_addr;
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u8 dev_id;
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err = sch311x_sio_enter(sio_config_port);
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if (err)
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return err;
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/* Check device ID. */
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reg = sch311x_sio_inb(sio_config_port, 0x20);
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switch (reg) {
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case 0x7c: /* SCH3112 */
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dev_id = 2;
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break;
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case 0x7d: /* SCH3114 */
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dev_id = 4;
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break;
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case 0x7f: /* SCH3116 */
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dev_id = 6;
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break;
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default:
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err = -ENODEV;
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goto exit;
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}
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/* Select logical device A (runtime registers) */
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sch311x_sio_outb(sio_config_port, 0x07, 0x0a);
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/* Check if Logical Device Register is currently active */
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if ((sch311x_sio_inb(sio_config_port, 0x30) & 0x01) == 0)
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pr_info("Seems that LDN 0x0a is not active...\n");
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/* Get the base address of the runtime registers */
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base_addr = (sch311x_sio_inb(sio_config_port, 0x60) << 8) |
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sch311x_sio_inb(sio_config_port, 0x61);
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if (!base_addr) {
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pr_err("Base address not set\n");
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err = -ENODEV;
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goto exit;
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}
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*addr = base_addr;
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pr_info("Found an SMSC SCH311%d chip at 0x%04x\n", dev_id, base_addr);
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exit:
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sch311x_sio_exit(sio_config_port);
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return err;
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}
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static int __init sch311x_gpio_pdev_add(const unsigned short addr)
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{
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struct sch311x_pdev_data pdata;
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int err;
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pdata.runtime_reg = addr;
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sch311x_gpio_pdev = platform_device_alloc(DRV_NAME, -1);
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if (!sch311x_gpio_pdev)
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return -ENOMEM;
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err = platform_device_add_data(sch311x_gpio_pdev,
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&pdata, sizeof(pdata));
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if (err) {
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pr_err(DRV_NAME "Platform data allocation failed\n");
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goto err;
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}
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err = platform_device_add(sch311x_gpio_pdev);
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if (err) {
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pr_err(DRV_NAME "Device addition failed\n");
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goto err;
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}
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return 0;
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err:
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platform_device_put(sch311x_gpio_pdev);
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return err;
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}
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static int __init sch311x_gpio_init(void)
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{
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int err, i;
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unsigned short addr = 0;
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for (i = 0; i < ARRAY_SIZE(sch311x_ioports); i++)
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if (sch311x_detect(sch311x_ioports[i], &addr) == 0)
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break;
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if (!addr)
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return -ENODEV;
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err = platform_driver_register(&sch311x_gpio_driver);
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if (err)
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return err;
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err = sch311x_gpio_pdev_add(addr);
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if (err)
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goto unreg_platform_driver;
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return 0;
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unreg_platform_driver:
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platform_driver_unregister(&sch311x_gpio_driver);
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return err;
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}
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static void __exit sch311x_gpio_exit(void)
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{
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platform_device_unregister(sch311x_gpio_pdev);
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platform_driver_unregister(&sch311x_gpio_driver);
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}
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module_init(sch311x_gpio_init);
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module_exit(sch311x_gpio_exit);
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MODULE_AUTHOR("Bruno Randolf <br1@einfach.org>");
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MODULE_DESCRIPTION("SMSC SCH311x GPIO Driver");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:gpio-sch311x");
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