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4664d4d860
Enables MPUSS ES2 power management mode using ES2_PM_MODE in
AMBA_IF_MODE register.
0x0: OMAP5 ES1 behavior, CPU cores would enter and exit OFF mode together.
Broken! Fortunately, we do not support this anymore.
0x1: OMAP5 ES2, DRA7 behavior, CPU cores are allowed to enter/exit OFF mode
independently.
This is one time settings thanks to always ON domain.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[nm@ti.com: minor conflict resolutions, consolidation for DRA7]
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
40 lines
1.2 KiB
C
40 lines
1.2 KiB
C
/*
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* OMAP WakeupGen header file
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*
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* Copyright (C) 2011 Texas Instruments, Inc.
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* Santosh Shilimkar <santosh.shilimkar@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef OMAP_ARCH_WAKEUPGEN_H
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#define OMAP_ARCH_WAKEUPGEN_H
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/* OMAP4 and OMAP5 has same base address */
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#define OMAP_WKUPGEN_BASE 0x48281000
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#define OMAP_WKG_CONTROL_0 0x00
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#define OMAP_WKG_ENB_A_0 0x10
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#define OMAP_WKG_ENB_B_0 0x14
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#define OMAP_WKG_ENB_C_0 0x18
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#define OMAP_WKG_ENB_D_0 0x1c
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#define OMAP_WKG_ENB_E_0 0x20
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#define OMAP_WKG_ENB_A_1 0x410
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#define OMAP_WKG_ENB_B_1 0x414
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#define OMAP_WKG_ENB_C_1 0x418
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#define OMAP_WKG_ENB_D_1 0x41c
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#define OMAP_WKG_ENB_E_1 0x420
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#define OMAP_AUX_CORE_BOOT_0 0x800
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#define OMAP_AUX_CORE_BOOT_1 0x804
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#define OMAP_AMBA_IF_MODE 0x80c
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#define OMAP_PTMSYNCREQ_MASK 0xc00
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#define OMAP_PTMSYNCREQ_EN 0xc04
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#define OMAP_TIMESTAMPCYCLELO 0xc08
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#define OMAP_TIMESTAMPCYCLEHI 0xc0c
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extern int __init omap_wakeupgen_init(void);
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extern void __iomem *omap_get_wakeupgen_base(void);
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extern int omap_secure_apis_support(void);
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#endif
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