linux/arch
Michael Ellerman 9de5cb0f6d powerpc/perf: Add per-event excludes on Power8
Power8 has a new register (MMCR2), which contains individual freeze bits
for each counter. This is an improvement on previous chips as it means
we can have multiple events on the PMU at the same time with different
exclude_{user,kernel,hv} settings. Previously we had to ensure all
events on the PMU had the same exclude settings.

The core of the patch is fairly simple. We use the 207S feature flag to
indicate that the PMU backend supports per-event excludes, if it's set
we skip the generic logic that enforces the equality of excludes between
events. We also use that flag to skip setting the freeze bits in MMCR0,
the PMU backend is expected to have handled setting them in MMCR2.

The complication arises with EBB. The FCxP bits in MMCR2 are accessible
R/W to a task using EBB. Which means a task using EBB will be able to
see that we are using MMCR2 for freezing, whereas the old logic which
used MMCR0 is not user visible.

The task can not see or affect exclude_kernel & exclude_hv, so we only
need to consider exclude_user.

The table below summarises the behaviour both before and after this
commit is applied:

 exclude_user           true  false
 ------------------------------------
        | User visible |  N    N
 Before | Can freeze   |  Y    Y
        | Can unfreeze |  N    Y
 ------------------------------------
        | User visible |  Y    Y
  After | Can freeze   |  Y    Y
        | Can unfreeze |  Y/N  Y
 ------------------------------------

So firstly I assert that the simple visibility of the exclude_user
setting in MMCR2 is a non-issue. The event belongs to the task, and
was most likely created by the task. So the exclude_user setting is not
privileged information in any way.

Secondly, the behaviour in the exclude_user = false case is unchanged.
This is important as it is the case that is actually useful, ie. the
event is created with no exclude setting and the task uses MMCR2 to
implement exclusion manually.

For exclude_user = true there is no meaningful change to freezing the
event. Previously the task could use MMCR2 to freeze the event, though
it was already frozen with MMCR0. With the new code the task can use
MMCR2 to freeze the event, though it was already frozen with MMCR2.

The only real change is when exclude_user = true and the task tries to
use MMCR2 to unfreeze the event. Previously this had no effect, because
the event was already frozen in MMCR0. With the new code the task can
unfreeze the event in MMCR2, but at some indeterminate time in the
future the kernel will overwrite its setting and refreeze the event.

Therefore my final assertion is that any task using exclude_user = true
and also fiddling with MMCR2 was deeply confused before this change, and
remains so after it.

Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2014-07-28 14:30:58 +10:00
..
alpha Merge commit '3cf2f34' into sched/core, to fix build error 2014-06-12 13:46:37 +02:00
arc Merge commit '3cf2f34' into sched/core, to fix build error 2014-06-12 13:46:37 +02:00
arm This pull request contains the second half the of the clk changes for 2014-06-15 16:02:20 -10:00
arm64 Merge commit '3cf2f34' into sched/core, to fix build error 2014-06-12 13:46:37 +02:00
avr32 Merge branch 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip into next 2014-06-03 12:57:53 -07:00
blackfin blackfin updates for Linux 3.16 2014-06-12 20:08:47 -07:00
c6x DeviceTree for 3.16: 2014-06-04 10:02:38 -07:00
cris cris: update comments for generic idle conversion 2014-06-06 16:08:18 -07:00
frv sys_sgetmask/sys_ssetmask: add CONFIG_SGETMASK_SYSCALL 2014-06-04 16:54:14 -07:00
hexagon
ia64 Merge commit '3cf2f34' into sched/core, to fix build error 2014-06-12 13:46:37 +02:00
m32r
m68k Merge commit '3cf2f34' into sched/core, to fix build error 2014-06-12 13:46:37 +02:00
metag Merge commit '3cf2f34' into sched/core, to fix build error 2014-06-12 13:46:37 +02:00
microblaze Microblaze patches for 3.16-rc1 2014-06-05 16:15:33 -07:00
mips Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next 2014-06-12 14:27:40 -07:00
mn10300 sys_sgetmask/sys_ssetmask: add CONFIG_SGETMASK_SYSCALL 2014-06-04 16:54:14 -07:00
openrisc DeviceTree for 3.16: 2014-06-04 10:02:38 -07:00
parisc Merge commit '3cf2f34' into sched/core, to fix build error 2014-06-12 13:46:37 +02:00
powerpc powerpc/perf: Add per-event excludes on Power8 2014-07-28 14:30:58 +10:00
s390 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next 2014-06-12 14:27:40 -07:00
score
sh Merge commit '3cf2f34' into sched/core, to fix build error 2014-06-12 13:46:37 +02:00
sparc Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next 2014-06-12 14:27:40 -07:00
tile Merge commit '3cf2f34' into sched/core, to fix build error 2014-06-12 13:46:37 +02:00
um Merge branch 'kbuild' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild 2014-06-12 21:23:38 -07:00
unicore32 arch/unicore32/mm/ioremap.c: return NULL on invalid pfn 2014-06-04 16:53:53 -07:00
x86 Merge branch 'x86-vdso-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2014-06-14 14:46:29 -07:00
xtensa Merge commit '3cf2f34' into sched/core, to fix build error 2014-06-12 13:46:37 +02:00
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