mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-12-20 09:34:44 +08:00
10cafa2d45
Cleanup by removing unneeded quotes from refs and redundant blank lines. No functional impact except adjusting to preferred coding style. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> # mediatek Acked-by: Rob Herring <robh@kernel.org> Acked-by: Hector Martin <marcan@marcan.st> # apple Acked-by: Paul Cercueil <paul@crapouillou.net> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> # Spear Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> # Renesas Reviewed-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> # Socionext Link: https://lore.kernel.org/r/20230124081117.31186-1-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
141 lines
3.3 KiB
YAML
141 lines
3.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: ARM PrimeCells PL080 and PL081 and derivatives DMA controller
|
|
|
|
maintainers:
|
|
- Vinod Koul <vkoul@kernel.org>
|
|
|
|
allOf:
|
|
- $ref: /schemas/arm/primecell.yaml#
|
|
- $ref: dma-controller.yaml#
|
|
|
|
# We need a select here so we don't match all nodes with 'arm,primecell'
|
|
select:
|
|
properties:
|
|
compatible:
|
|
contains:
|
|
enum:
|
|
- arm,pl080
|
|
- arm,pl081
|
|
required:
|
|
- compatible
|
|
|
|
properties:
|
|
compatible:
|
|
oneOf:
|
|
- items:
|
|
- enum:
|
|
- arm,pl080
|
|
- arm,pl081
|
|
- const: arm,primecell
|
|
- items:
|
|
- const: faraday,ftdma020
|
|
- const: arm,pl080
|
|
- const: arm,primecell
|
|
|
|
reg:
|
|
maxItems: 1
|
|
description: Address range of the PL08x registers
|
|
|
|
interrupts:
|
|
minItems: 1
|
|
description: The PL08x interrupt number
|
|
|
|
clocks:
|
|
minItems: 1
|
|
description: The clock running the IP core clock
|
|
|
|
clock-names:
|
|
maxItems: 1
|
|
|
|
lli-bus-interface-ahb1:
|
|
type: boolean
|
|
description: if AHB master 1 is eligible for fetching LLIs
|
|
|
|
lli-bus-interface-ahb2:
|
|
type: boolean
|
|
description: if AHB master 2 is eligible for fetching LLIs
|
|
|
|
mem-bus-interface-ahb1:
|
|
type: boolean
|
|
description: if AHB master 1 is eligible for fetching memory contents
|
|
|
|
mem-bus-interface-ahb2:
|
|
type: boolean
|
|
description: if AHB master 2 is eligible for fetching memory contents
|
|
|
|
memcpy-burst-size:
|
|
$ref: /schemas/types.yaml#/definitions/uint32
|
|
enum:
|
|
- 1
|
|
- 4
|
|
- 8
|
|
- 16
|
|
- 32
|
|
- 64
|
|
- 128
|
|
- 256
|
|
description: the size of the bursts for memcpy
|
|
|
|
memcpy-bus-width:
|
|
$ref: /schemas/types.yaml#/definitions/uint32
|
|
enum:
|
|
- 8
|
|
- 16
|
|
- 32
|
|
- 64
|
|
description: bus width used for memcpy in bits. FTDMAC020 also accept 64 bits
|
|
|
|
resets:
|
|
maxItems: 1
|
|
|
|
required:
|
|
- reg
|
|
- interrupts
|
|
- clocks
|
|
- clock-names
|
|
- "#dma-cells"
|
|
|
|
unevaluatedProperties: false
|
|
|
|
examples:
|
|
- |
|
|
dmac0: dma-controller@10130000 {
|
|
compatible = "arm,pl080", "arm,primecell";
|
|
reg = <0x10130000 0x1000>;
|
|
interrupt-parent = <&vica>;
|
|
interrupts = <15>;
|
|
clocks = <&hclkdma0>;
|
|
clock-names = "apb_pclk";
|
|
lli-bus-interface-ahb1;
|
|
lli-bus-interface-ahb2;
|
|
mem-bus-interface-ahb2;
|
|
memcpy-burst-size = <256>;
|
|
memcpy-bus-width = <32>;
|
|
#dma-cells = <2>;
|
|
};
|
|
- |
|
|
#include <dt-bindings/interrupt-controller/irq.h>
|
|
#include <dt-bindings/reset/cortina,gemini-reset.h>
|
|
#include <dt-bindings/clock/cortina,gemini-clock.h>
|
|
dma-controller@67000000 {
|
|
compatible = "faraday,ftdma020", "arm,pl080", "arm,primecell";
|
|
/* Faraday Technology FTDMAC020 variant */
|
|
arm,primecell-periphid = <0x0003b080>;
|
|
reg = <0x67000000 0x1000>;
|
|
interrupts = <9 IRQ_TYPE_EDGE_RISING>;
|
|
resets = <&syscon GEMINI_RESET_DMAC>;
|
|
clocks = <&syscon GEMINI_CLK_AHB>;
|
|
clock-names = "apb_pclk";
|
|
/* Bus interface AHB1 (AHB0) is totally tilted */
|
|
lli-bus-interface-ahb2;
|
|
mem-bus-interface-ahb2;
|
|
memcpy-burst-size = <256>;
|
|
memcpy-bus-width = <32>;
|
|
#dma-cells = <2>;
|
|
};
|