mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-17 01:04:19 +08:00
c6d289d0cc
Each text file under Documentation follows a different format. Some doesn't even have titles! Change its representation to follow the adopted standard, using ReST markups for it to be parseable by Sphinx: - Add a title for the document. Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
61 lines
2.5 KiB
Plaintext
61 lines
2.5 KiB
Plaintext
=================================================
|
|
Msc Keyboard Scan Expansion/GPIO Expansion device
|
|
=================================================
|
|
|
|
What is smsc-ece1099?
|
|
----------------------
|
|
|
|
The ECE1099 is a 40-Pin 3.3V Keyboard Scan Expansion
|
|
or GPIO Expansion device. The device supports a keyboard
|
|
scan matrix of 23x8. The device is connected to a Master
|
|
via the SMSC BC-Link interface or via the SMBus.
|
|
Keypad scan Input(KSI) and Keypad Scan Output(KSO) signals
|
|
are multiplexed with GPIOs.
|
|
|
|
Interrupt generation
|
|
--------------------
|
|
|
|
Interrupts can be generated by an edge detection on a GPIO
|
|
pin or an edge detection on one of the bus interface pins.
|
|
Interrupts can also be detected on the keyboard scan interface.
|
|
The bus interrupt pin (BC_INT# or SMBUS_INT#) is asserted if
|
|
any bit in one of the Interrupt Status registers is 1 and
|
|
the corresponding Interrupt Mask bit is also 1.
|
|
|
|
In order for software to determine which device is the source
|
|
of an interrupt, it should first read the Group Interrupt Status Register
|
|
to determine which Status register group is a source for the interrupt.
|
|
Software should read both the Status register and the associated Mask register,
|
|
then AND the two values together. Bits that are 1 in the result of the AND
|
|
are active interrupts. Software clears an interrupt by writing a 1 to the
|
|
corresponding bit in the Status register.
|
|
|
|
Communication Protocol
|
|
----------------------
|
|
|
|
- SMbus slave Interface
|
|
The host processor communicates with the ECE1099 device
|
|
through a series of read/write registers via the SMBus
|
|
interface. SMBus is a serial communication protocol between
|
|
a computer host and its peripheral devices. The SMBus data
|
|
rate is 10KHz minimum to 400 KHz maximum
|
|
|
|
- Slave Bus Interface
|
|
The ECE1099 device SMBus implementation is a subset of the
|
|
SMBus interface to the host. The device is a slave-only SMBus device.
|
|
The implementation in the device is a subset of SMBus since it
|
|
only supports four protocols.
|
|
|
|
The Write Byte, Read Byte, Send Byte, and Receive Byte protocols are the
|
|
only valid SMBus protocols for the device.
|
|
|
|
- BC-LinkTM Interface
|
|
The BC-Link is a proprietary bus that allows communication
|
|
between a Master device and a Companion device. The Master
|
|
device uses this serial bus to read and write registers
|
|
located on the Companion device. The bus comprises three signals,
|
|
BC_CLK, BC_DAT and BC_INT#. The Master device always provides the
|
|
clock, BC_CLK, and the Companion device is the source for an
|
|
independent asynchronous interrupt signal, BC_INT#. The ECE1099
|
|
supports BC-Link speeds up to 24MHz.
|