Bin Meng 9cbb035cc1 spi-nor: intel-spi: Fix number of protected range registers for BYT/LPT ... The number of protected range registers is not the same on BYT/LPT/ BXT. GPR0 only exists on Apollo Lake and its offset is reserved on other platforms. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>		2017-10-11 09:40:06 +02:00
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aspeed-smc.c	mtd: spi-nor: aspeed: set 4B setting for all chips	2017-08-14 17:23:50 +02:00
atmel-quadspi.c	mtd: atmel-quadspi: Remove unneeded pinctrl header	2017-08-01 21:23:21 +02:00
cadence-quadspi.c	mtd: spi-nor: cqspi: remove duplicate const	2017-06-27 21:28:52 +02:00
fsl-quadspi.c	mtd: spi-nor: introduce SPI 1-2-2 and SPI 1-4-4 protocols	2017-05-15 21:56:17 +02:00
hisi-sfc.c	mtd: Convert to using %pOF instead of full_name	2017-08-15 14:00:43 +02:00
intel-spi-pci.c	mtd: spi-nor: intel-spi: Add support for Intel Cedar Fork SPI serial flash	2017-10-10 18:56:40 +02:00
intel-spi-platform.c	spi-nor: Add support for Intel SPI serial flash controller	2017-01-03 17:33:36 +00:00
intel-spi.c	spi-nor: intel-spi: Fix number of protected range registers for BYT/LPT	2017-10-11 09:40:06 +02:00
intel-spi.h	spi-nor: Add support for Intel SPI serial flash controller	2017-01-03 17:33:36 +00:00
Kconfig	mtd: spi-nor: Allow Cadence QSPI support for ARM64	2017-10-10 18:29:08 +02:00
Makefile	mtd: spi-nor: fix "No newline at end of file"	2017-08-14 18:09:22 +02:00
mtk-quadspi.c	mtd: mtk-quadspi: Remove unneeded pinctrl header	2017-08-01 21:24:47 +02:00
nxp-spifi.c	mtd: spi-nor: introduce SPI 1-2-2 and SPI 1-4-4 protocols	2017-05-15 21:56:17 +02:00
spi-nor.c	mtd: spi-nor: add support for Gigadevice GD25LQ32	2017-10-10 18:49:03 +02:00
stm32-quadspi.c	mtd: spi-nor: stm32-quadspi: fix compiler errors with COMPILE_TEST	2017-05-15 21:56:18 +02:00