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9c48c0965b
Moving the early IDT setup out of assembly code breaks the boot on first
generation 486 systems.
The reason is that the call of idt_setup_early_handler, which sets up the
early handlers was added after the call to cr4_init_shadow().
cr4_init_shadow() tries to read CR4 which is not available on those
systems. The accessor function uses a extable fixup to handle the resulting
fault. As the IDT is not set up yet, the cr4 read exception causes an
instantaneous reboot for obvious reasons.
Call idt_setup_early_handler() before cr4_init_shadow() so IDT is set up
before the first exception hits.
Fixes: 87e81786b1 ("x86/idt: Move early IDT setup out of 32-bit asm")
Reported-and-tested-by: Matthew Whitehead <whiteheadm@acm.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Andy Lutomirski <luto@kernel.org>
Link: https://lkml.kernel.org/r/alpine.DEB.2.20.1710161210290.1973@nanos
119 lines
3.1 KiB
C
119 lines
3.1 KiB
C
/*
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* linux/arch/i386/kernel/head32.c -- prepare to run common code
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*
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* Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE
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* Copyright (C) 2007 Eric Biederman <ebiederm@xmission.com>
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*/
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#include <linux/init.h>
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#include <linux/start_kernel.h>
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#include <linux/mm.h>
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#include <linux/memblock.h>
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#include <asm/desc.h>
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#include <asm/setup.h>
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#include <asm/sections.h>
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#include <asm/e820/api.h>
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#include <asm/page.h>
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#include <asm/apic.h>
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#include <asm/io_apic.h>
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#include <asm/bios_ebda.h>
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#include <asm/tlbflush.h>
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#include <asm/bootparam_utils.h>
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static void __init i386_default_early_setup(void)
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{
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/* Initialize 32bit specific setup functions */
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x86_init.resources.reserve_resources = i386_reserve_resources;
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x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc;
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}
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asmlinkage __visible void __init i386_start_kernel(void)
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{
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/* Make sure IDT is set up before any exception happens */
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idt_setup_early_handler();
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cr4_init_shadow();
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sanitize_boot_params(&boot_params);
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x86_early_init_platform_quirks();
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/* Call the subarch specific early setup function */
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switch (boot_params.hdr.hardware_subarch) {
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case X86_SUBARCH_INTEL_MID:
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x86_intel_mid_early_setup();
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break;
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case X86_SUBARCH_CE4100:
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x86_ce4100_early_setup();
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break;
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default:
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i386_default_early_setup();
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break;
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}
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start_kernel();
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}
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/*
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* Initialize page tables. This creates a PDE and a set of page
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* tables, which are located immediately beyond __brk_base. The variable
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* _brk_end is set up to point to the first "safe" location.
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* Mappings are created both at virtual address 0 (identity mapping)
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* and PAGE_OFFSET for up to _end.
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*
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* In PAE mode initial_page_table is statically defined to contain
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* enough entries to cover the VMSPLIT option (that is the top 1, 2 or 3
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* entries). The identity mapping is handled by pointing two PGD entries
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* to the first kernel PMD. Note the upper half of each PMD or PTE are
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* always zero at this stage.
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*/
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void __init mk_early_pgtbl_32(void)
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{
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#ifdef __pa
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#undef __pa
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#endif
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#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET)
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pte_t pte, *ptep;
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int i;
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unsigned long *ptr;
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/* Enough space to fit pagetables for the low memory linear map */
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const unsigned long limit = __pa(_end) +
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(PAGE_TABLE_SIZE(LOWMEM_PAGES) << PAGE_SHIFT);
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#ifdef CONFIG_X86_PAE
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pmd_t pl2, *pl2p = (pmd_t *)__pa(initial_pg_pmd);
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#define SET_PL2(pl2, val) { (pl2).pmd = (val); }
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#else
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pgd_t pl2, *pl2p = (pgd_t *)__pa(initial_page_table);
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#define SET_PL2(pl2, val) { (pl2).pgd = (val); }
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#endif
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ptep = (pte_t *)__pa(__brk_base);
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pte.pte = PTE_IDENT_ATTR;
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while ((pte.pte & PTE_PFN_MASK) < limit) {
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SET_PL2(pl2, (unsigned long)ptep | PDE_IDENT_ATTR);
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*pl2p = pl2;
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#ifndef CONFIG_X86_PAE
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/* Kernel PDE entry */
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*(pl2p + ((PAGE_OFFSET >> PGDIR_SHIFT))) = pl2;
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#endif
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for (i = 0; i < PTRS_PER_PTE; i++) {
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*ptep = pte;
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pte.pte += PAGE_SIZE;
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ptep++;
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}
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pl2p++;
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}
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ptr = (unsigned long *)__pa(&max_pfn_mapped);
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/* Can't use pte_pfn() since it's a call with CONFIG_PARAVIRT */
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*ptr = (pte.pte & PTE_PFN_MASK) >> PAGE_SHIFT;
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ptr = (unsigned long *)__pa(&_brk_end);
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*ptr = (unsigned long)ptep + PAGE_OFFSET;
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}
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