linux/arch/arm/mach-vexpress/platsmp.c
Thomas Gleixner d2912cb15b treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-19 17:09:55 +02:00

97 lines
2.2 KiB
C

// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/mach-vexpress/platsmp.c
*
* Copyright (C) 2002 ARM Ltd.
* All Rights Reserved
*/
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/smp.h>
#include <linux/io.h>
#include <linux/of_address.h>
#include <linux/vexpress.h>
#include <asm/mcpm.h>
#include <asm/smp_scu.h>
#include <asm/mach/map.h>
#include <plat/platsmp.h>
#include "core.h"
bool __init vexpress_smp_init_ops(void)
{
#ifdef CONFIG_MCPM
int cpu;
struct device_node *cpu_node, *cci_node;
/*
* The best way to detect a multi-cluster configuration
* is to detect if the kernel can take over CCI ports
* control. Loop over possible CPUs and check if CCI
* port control is available.
* Override the default vexpress_smp_ops if so.
*/
for_each_possible_cpu(cpu) {
bool available;
cpu_node = of_get_cpu_node(cpu, NULL);
if (WARN(!cpu_node, "Missing cpu device node!"))
return false;
cci_node = of_parse_phandle(cpu_node, "cci-control-port", 0);
available = cci_node && of_device_is_available(cci_node);
of_node_put(cci_node);
of_node_put(cpu_node);
if (!available)
return false;
}
mcpm_smp_set_ops();
return true;
#else
return false;
#endif
}
static const struct of_device_id vexpress_smp_dt_scu_match[] __initconst = {
{ .compatible = "arm,cortex-a5-scu", },
{ .compatible = "arm,cortex-a9-scu", },
{}
};
static void __init vexpress_smp_dt_prepare_cpus(unsigned int max_cpus)
{
struct device_node *scu = of_find_matching_node(NULL,
vexpress_smp_dt_scu_match);
if (scu)
scu_enable(of_iomap(scu, 0));
/*
* Write the address of secondary startup into the
* system-wide flags register. The boot monitor waits
* until it receives a soft interrupt, and then the
* secondary CPU branches to this address.
*/
vexpress_flags_set(__pa_symbol(versatile_secondary_startup));
}
#ifdef CONFIG_HOTPLUG_CPU
static void vexpress_cpu_die(unsigned int cpu)
{
versatile_immitation_cpu_die(cpu, 0x40);
}
#endif
const struct smp_operations vexpress_smp_dt_ops __initconst = {
.smp_prepare_cpus = vexpress_smp_dt_prepare_cpus,
.smp_secondary_init = versatile_secondary_init,
.smp_boot_secondary = versatile_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU
.cpu_die = vexpress_cpu_die,
#endif
};