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In addition to the PHYTEC phyCORE-i.MX 6UL the PHYTEC phyBOARD-Segin is also available with the PHYTEC phyCORE-i.MX 6ULL. So this adds support for this SOM and its baseboards. It comes in a full featured option with either NAND flash or eMMC and in a low cost option only available with NAND flash. The hardware specs are: - Full featured with NAND or eMMC: * i.MX 6ULL Y2 * 512MB DDR3 memory * 512MB NAND flash or 4GB/8GB eMMC * Dual 10/100 Ethernet * USB Host and USB OTG * RS232 * MicroSD external storage * Audio, RS232, I2C, SPI, CAN headers * Further I/O options via A/V and Expansion headers - Low cost with NAND: * i.MX 6ULL Y0 * 256MB DDR3 memory * 128MB NAND flash * Single 10/100 Ethernet * USB OTG * RS232 * MicroSD external storage * I2C * Further I/O options via Expansion headers Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
39 lines
749 B
Plaintext
39 lines
749 B
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2019 PHYTEC Messtechnik GmbH
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* Author: Stefan Riedmueller <s.riedmueller@phytec.de>
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*/
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#include "imx6ul-phytec-segin.dtsi"
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/ {
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model = "PHYTEC phyBOARD-Segin i.MX6 ULL";
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compatible = "phytec,imx6ull-pbacd-10", "phytec,imx6ull-pcl063","fsl,imx6ull";
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};
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&iomuxc {
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/delete-node/ flexcan1engrp;
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/delete-node/ rtcintgrp;
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/delete-node/ stmpegrp;
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};
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&iomuxc_snvs {
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princtrl_flexcan1_en: flexcan1engrp {
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fsl,pins = <
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MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x17059
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>;
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};
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pinctrl_rtc_int: rtcintgrp {
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fsl,pins = <
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MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x17059
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>;
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};
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pinctrl_stmpe: stmpegrp {
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fsl,pins = <
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MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x17059
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>;
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};
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};
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