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c19c03fc74
This makes unmap_vm_area static and a wrapper around a new exported unmap_kernel_range that takes an explicit range instead of a vm_area struct. This makes it more versatile for code that wants to play with kernel page tables outside of the standard vmalloc area. (One example is some rework of the PowerPC PCI IO space mapping code that depends on that patch and removes some code duplication and horrible abuse of forged struct vm_struct). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
409 lines
17 KiB
Plaintext
409 lines
17 KiB
Plaintext
Cache and TLB Flushing
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Under Linux
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David S. Miller <davem@redhat.com>
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This document describes the cache/tlb flushing interfaces called
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by the Linux VM subsystem. It enumerates over each interface,
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describes it's intended purpose, and what side effect is expected
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after the interface is invoked.
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The side effects described below are stated for a uniprocessor
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implementation, and what is to happen on that single processor. The
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SMP cases are a simple extension, in that you just extend the
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definition such that the side effect for a particular interface occurs
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on all processors in the system. Don't let this scare you into
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thinking SMP cache/tlb flushing must be so inefficient, this is in
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fact an area where many optimizations are possible. For example,
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if it can be proven that a user address space has never executed
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on a cpu (see vma->cpu_vm_mask), one need not perform a flush
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for this address space on that cpu.
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First, the TLB flushing interfaces, since they are the simplest. The
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"TLB" is abstracted under Linux as something the cpu uses to cache
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virtual-->physical address translations obtained from the software
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page tables. Meaning that if the software page tables change, it is
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possible for stale translations to exist in this "TLB" cache.
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Therefore when software page table changes occur, the kernel will
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invoke one of the following flush methods _after_ the page table
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changes occur:
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1) void flush_tlb_all(void)
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The most severe flush of all. After this interface runs,
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any previous page table modification whatsoever will be
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visible to the cpu.
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This is usually invoked when the kernel page tables are
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changed, since such translations are "global" in nature.
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2) void flush_tlb_mm(struct mm_struct *mm)
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This interface flushes an entire user address space from
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the TLB. After running, this interface must make sure that
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any previous page table modifications for the address space
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'mm' will be visible to the cpu. That is, after running,
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there will be no entries in the TLB for 'mm'.
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This interface is used to handle whole address space
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page table operations such as what happens during
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fork, and exec.
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3) void flush_tlb_range(struct vm_area_struct *vma,
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unsigned long start, unsigned long end)
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Here we are flushing a specific range of (user) virtual
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address translations from the TLB. After running, this
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interface must make sure that any previous page table
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modifications for the address space 'vma->vm_mm' in the range
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'start' to 'end-1' will be visible to the cpu. That is, after
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running, here will be no entries in the TLB for 'mm' for
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virtual addresses in the range 'start' to 'end-1'.
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The "vma" is the backing store being used for the region.
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Primarily, this is used for munmap() type operations.
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The interface is provided in hopes that the port can find
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a suitably efficient method for removing multiple page
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sized translations from the TLB, instead of having the kernel
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call flush_tlb_page (see below) for each entry which may be
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modified.
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4) void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
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This time we need to remove the PAGE_SIZE sized translation
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from the TLB. The 'vma' is the backing structure used by
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Linux to keep track of mmap'd regions for a process, the
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address space is available via vma->vm_mm. Also, one may
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test (vma->vm_flags & VM_EXEC) to see if this region is
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executable (and thus could be in the 'instruction TLB' in
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split-tlb type setups).
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After running, this interface must make sure that any previous
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page table modification for address space 'vma->vm_mm' for
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user virtual address 'addr' will be visible to the cpu. That
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is, after running, there will be no entries in the TLB for
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'vma->vm_mm' for virtual address 'addr'.
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This is used primarily during fault processing.
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5) void flush_tlb_pgtables(struct mm_struct *mm,
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unsigned long start, unsigned long end)
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The software page tables for address space 'mm' for virtual
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addresses in the range 'start' to 'end-1' are being torn down.
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Some platforms cache the lowest level of the software page tables
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in a linear virtually mapped array, to make TLB miss processing
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more efficient. On such platforms, since the TLB is caching the
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software page table structure, it needs to be flushed when parts
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of the software page table tree are unlinked/freed.
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Sparc64 is one example of a platform which does this.
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Usually, when munmap()'ing an area of user virtual address
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space, the kernel leaves the page table parts around and just
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marks the individual pte's as invalid. However, if very large
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portions of the address space are unmapped, the kernel frees up
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those portions of the software page tables to prevent potential
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excessive kernel memory usage caused by erratic mmap/mmunmap
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sequences. It is at these times that flush_tlb_pgtables will
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be invoked.
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6) void update_mmu_cache(struct vm_area_struct *vma,
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unsigned long address, pte_t pte)
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At the end of every page fault, this routine is invoked to
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tell the architecture specific code that a translation
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described by "pte" now exists at virtual address "address"
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for address space "vma->vm_mm", in the software page tables.
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A port may use this information in any way it so chooses.
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For example, it could use this event to pre-load TLB
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translations for software managed TLB configurations.
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The sparc64 port currently does this.
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7) void tlb_migrate_finish(struct mm_struct *mm)
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This interface is called at the end of an explicit
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process migration. This interface provides a hook
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to allow a platform to update TLB or context-specific
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information for the address space.
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The ia64 sn2 platform is one example of a platform
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that uses this interface.
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8) void lazy_mmu_prot_update(pte_t pte)
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This interface is called whenever the protection on
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any user PTEs change. This interface provides a notification
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to architecture specific code to take appropriate action.
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Next, we have the cache flushing interfaces. In general, when Linux
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is changing an existing virtual-->physical mapping to a new value,
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the sequence will be in one of the following forms:
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1) flush_cache_mm(mm);
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change_all_page_tables_of(mm);
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flush_tlb_mm(mm);
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2) flush_cache_range(vma, start, end);
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change_range_of_page_tables(mm, start, end);
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flush_tlb_range(vma, start, end);
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3) flush_cache_page(vma, addr, pfn);
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set_pte(pte_pointer, new_pte_val);
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flush_tlb_page(vma, addr);
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The cache level flush will always be first, because this allows
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us to properly handle systems whose caches are strict and require
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a virtual-->physical translation to exist for a virtual address
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when that virtual address is flushed from the cache. The HyperSparc
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cpu is one such cpu with this attribute.
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The cache flushing routines below need only deal with cache flushing
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to the extent that it is necessary for a particular cpu. Mostly,
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these routines must be implemented for cpus which have virtually
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indexed caches which must be flushed when virtual-->physical
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translations are changed or removed. So, for example, the physically
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indexed physically tagged caches of IA32 processors have no need to
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implement these interfaces since the caches are fully synchronized
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and have no dependency on translation information.
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Here are the routines, one by one:
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1) void flush_cache_mm(struct mm_struct *mm)
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This interface flushes an entire user address space from
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the caches. That is, after running, there will be no cache
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lines associated with 'mm'.
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This interface is used to handle whole address space
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page table operations such as what happens during exit and exec.
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2) void flush_cache_dup_mm(struct mm_struct *mm)
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This interface flushes an entire user address space from
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the caches. That is, after running, there will be no cache
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lines associated with 'mm'.
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This interface is used to handle whole address space
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page table operations such as what happens during fork.
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This option is separate from flush_cache_mm to allow some
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optimizations for VIPT caches.
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3) void flush_cache_range(struct vm_area_struct *vma,
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unsigned long start, unsigned long end)
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Here we are flushing a specific range of (user) virtual
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addresses from the cache. After running, there will be no
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entries in the cache for 'vma->vm_mm' for virtual addresses in
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the range 'start' to 'end-1'.
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The "vma" is the backing store being used for the region.
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Primarily, this is used for munmap() type operations.
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The interface is provided in hopes that the port can find
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a suitably efficient method for removing multiple page
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sized regions from the cache, instead of having the kernel
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call flush_cache_page (see below) for each entry which may be
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modified.
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4) void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn)
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This time we need to remove a PAGE_SIZE sized range
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from the cache. The 'vma' is the backing structure used by
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Linux to keep track of mmap'd regions for a process, the
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address space is available via vma->vm_mm. Also, one may
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test (vma->vm_flags & VM_EXEC) to see if this region is
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executable (and thus could be in the 'instruction cache' in
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"Harvard" type cache layouts).
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The 'pfn' indicates the physical page frame (shift this value
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left by PAGE_SHIFT to get the physical address) that 'addr'
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translates to. It is this mapping which should be removed from
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the cache.
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After running, there will be no entries in the cache for
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'vma->vm_mm' for virtual address 'addr' which translates
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to 'pfn'.
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This is used primarily during fault processing.
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5) void flush_cache_kmaps(void)
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This routine need only be implemented if the platform utilizes
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highmem. It will be called right before all of the kmaps
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are invalidated.
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After running, there will be no entries in the cache for
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the kernel virtual address range PKMAP_ADDR(0) to
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PKMAP_ADDR(LAST_PKMAP).
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This routing should be implemented in asm/highmem.h
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6) void flush_cache_vmap(unsigned long start, unsigned long end)
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void flush_cache_vunmap(unsigned long start, unsigned long end)
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Here in these two interfaces we are flushing a specific range
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of (kernel) virtual addresses from the cache. After running,
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there will be no entries in the cache for the kernel address
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space for virtual addresses in the range 'start' to 'end-1'.
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The first of these two routines is invoked after map_vm_area()
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has installed the page table entries. The second is invoked
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before unmap_kernel_range() deletes the page table entries.
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There exists another whole class of cpu cache issues which currently
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require a whole different set of interfaces to handle properly.
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The biggest problem is that of virtual aliasing in the data cache
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of a processor.
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Is your port susceptible to virtual aliasing in it's D-cache?
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Well, if your D-cache is virtually indexed, is larger in size than
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PAGE_SIZE, and does not prevent multiple cache lines for the same
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physical address from existing at once, you have this problem.
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If your D-cache has this problem, first define asm/shmparam.h SHMLBA
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properly, it should essentially be the size of your virtually
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addressed D-cache (or if the size is variable, the largest possible
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size). This setting will force the SYSv IPC layer to only allow user
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processes to mmap shared memory at address which are a multiple of
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this value.
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NOTE: This does not fix shared mmaps, check out the sparc64 port for
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one way to solve this (in particular SPARC_FLAG_MMAPSHARED).
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Next, you have to solve the D-cache aliasing issue for all
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other cases. Please keep in mind that fact that, for a given page
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mapped into some user address space, there is always at least one more
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mapping, that of the kernel in it's linear mapping starting at
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PAGE_OFFSET. So immediately, once the first user maps a given
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physical page into its address space, by implication the D-cache
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aliasing problem has the potential to exist since the kernel already
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maps this page at its virtual address.
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void copy_user_page(void *to, void *from, unsigned long addr, struct page *page)
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void clear_user_page(void *to, unsigned long addr, struct page *page)
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These two routines store data in user anonymous or COW
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pages. It allows a port to efficiently avoid D-cache alias
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issues between userspace and the kernel.
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For example, a port may temporarily map 'from' and 'to' to
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kernel virtual addresses during the copy. The virtual address
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for these two pages is chosen in such a way that the kernel
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load/store instructions happen to virtual addresses which are
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of the same "color" as the user mapping of the page. Sparc64
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for example, uses this technique.
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The 'addr' parameter tells the virtual address where the
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user will ultimately have this page mapped, and the 'page'
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parameter gives a pointer to the struct page of the target.
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If D-cache aliasing is not an issue, these two routines may
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simply call memcpy/memset directly and do nothing more.
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void flush_dcache_page(struct page *page)
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Any time the kernel writes to a page cache page, _OR_
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the kernel is about to read from a page cache page and
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user space shared/writable mappings of this page potentially
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exist, this routine is called.
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NOTE: This routine need only be called for page cache pages
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which can potentially ever be mapped into the address
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space of a user process. So for example, VFS layer code
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handling vfs symlinks in the page cache need not call
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this interface at all.
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The phrase "kernel writes to a page cache page" means,
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specifically, that the kernel executes store instructions
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that dirty data in that page at the page->virtual mapping
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of that page. It is important to flush here to handle
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D-cache aliasing, to make sure these kernel stores are
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visible to user space mappings of that page.
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The corollary case is just as important, if there are users
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which have shared+writable mappings of this file, we must make
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sure that kernel reads of these pages will see the most recent
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stores done by the user.
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If D-cache aliasing is not an issue, this routine may
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simply be defined as a nop on that architecture.
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There is a bit set aside in page->flags (PG_arch_1) as
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"architecture private". The kernel guarantees that,
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for pagecache pages, it will clear this bit when such
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a page first enters the pagecache.
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This allows these interfaces to be implemented much more
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efficiently. It allows one to "defer" (perhaps indefinitely)
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the actual flush if there are currently no user processes
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mapping this page. See sparc64's flush_dcache_page and
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update_mmu_cache implementations for an example of how to go
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about doing this.
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The idea is, first at flush_dcache_page() time, if
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page->mapping->i_mmap is an empty tree and ->i_mmap_nonlinear
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an empty list, just mark the architecture private page flag bit.
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Later, in update_mmu_cache(), a check is made of this flag bit,
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and if set the flush is done and the flag bit is cleared.
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IMPORTANT NOTE: It is often important, if you defer the flush,
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that the actual flush occurs on the same CPU
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as did the cpu stores into the page to make it
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dirty. Again, see sparc64 for examples of how
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to deal with this.
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void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
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unsigned long user_vaddr,
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void *dst, void *src, int len)
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void copy_from_user_page(struct vm_area_struct *vma, struct page *page,
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unsigned long user_vaddr,
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void *dst, void *src, int len)
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When the kernel needs to copy arbitrary data in and out
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of arbitrary user pages (f.e. for ptrace()) it will use
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these two routines.
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Any necessary cache flushing or other coherency operations
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that need to occur should happen here. If the processor's
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instruction cache does not snoop cpu stores, it is very
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likely that you will need to flush the instruction cache
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for copy_to_user_page().
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void flush_anon_page(struct vm_area_struct *vma, struct page *page,
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unsigned long vmaddr)
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When the kernel needs to access the contents of an anonymous
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page, it calls this function (currently only
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get_user_pages()). Note: flush_dcache_page() deliberately
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doesn't work for an anonymous page. The default
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implementation is a nop (and should remain so for all coherent
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architectures). For incoherent architectures, it should flush
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the cache of the page at vmaddr.
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void flush_kernel_dcache_page(struct page *page)
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When the kernel needs to modify a user page is has obtained
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with kmap, it calls this function after all modifications are
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complete (but before kunmapping it) to bring the underlying
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page up to date. It is assumed here that the user has no
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incoherent cached copies (i.e. the original page was obtained
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from a mechanism like get_user_pages()). The default
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implementation is a nop and should remain so on all coherent
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architectures. On incoherent architectures, this should flush
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the kernel cache for page (using page_address(page)).
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void flush_icache_range(unsigned long start, unsigned long end)
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When the kernel stores into addresses that it will execute
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out of (eg when loading modules), this function is called.
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If the icache does not snoop stores then this routine will need
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to flush it.
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void flush_icache_page(struct vm_area_struct *vma, struct page *page)
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All the functionality of flush_icache_page can be implemented in
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flush_dcache_page and update_mmu_cache. In 2.7 the hope is to
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remove this interface completely.
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