mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-12-05 18:14:07 +08:00
6f52b16c5b
Many user space API headers are missing licensing information, which makes it hard for compliance tools to determine the correct license. By default are files without license information under the default license of the kernel, which is GPLV2. Marking them GPLV2 would exclude them from being included in non GPLV2 code, which is obviously not intended. The user space API headers fall under the syscall exception which is in the kernels COPYING file: NOTE! This copyright does *not* cover user programs that use kernel services by normal system calls - this is merely considered normal use of the kernel, and does *not* fall under the heading of "derived work". otherwise syscall usage would not be possible. Update the files which contain no license information with an SPDX license identifier. The chosen identifier is 'GPL-2.0 WITH Linux-syscall-note' which is the officially assigned identifier for the Linux syscall exception. SPDX license identifiers are a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. See the previous patch in this series for the methodology of how this patch was researched. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
249 lines
8.1 KiB
C
249 lines
8.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
|
|
/*
|
|
* Copyright (C) 1998-2004 Hewlett-Packard Co
|
|
* David Mosberger-Tang <davidm@hpl.hp.com>
|
|
* Stephane Eranian <eranian@hpl.hp.com>
|
|
* Copyright (C) 2003 Intel Co
|
|
* Suresh Siddha <suresh.b.siddha@intel.com>
|
|
* Fenghua Yu <fenghua.yu@intel.com>
|
|
* Arun Sharma <arun.sharma@intel.com>
|
|
*
|
|
* 12/07/98 S. Eranian added pt_regs & switch_stack
|
|
* 12/21/98 D. Mosberger updated to match latest code
|
|
* 6/17/99 D. Mosberger added second unat member to "struct switch_stack"
|
|
*
|
|
*/
|
|
#ifndef _UAPI_ASM_IA64_PTRACE_H
|
|
#define _UAPI_ASM_IA64_PTRACE_H
|
|
|
|
/*
|
|
* When a user process is blocked, its state looks as follows:
|
|
*
|
|
* +----------------------+ ------- IA64_STK_OFFSET
|
|
* | | ^
|
|
* | struct pt_regs | |
|
|
* | | |
|
|
* +----------------------+ |
|
|
* | | |
|
|
* | memory stack | |
|
|
* | (growing downwards) | |
|
|
* //.....................// |
|
|
* |
|
|
* //.....................// |
|
|
* | | |
|
|
* +----------------------+ |
|
|
* | struct switch_stack | |
|
|
* | | |
|
|
* +----------------------+ |
|
|
* | | |
|
|
* //.....................// |
|
|
* |
|
|
* //.....................// |
|
|
* | | |
|
|
* | register stack | |
|
|
* | (growing upwards) | |
|
|
* | | |
|
|
* +----------------------+ | --- IA64_RBS_OFFSET
|
|
* | struct thread_info | | ^
|
|
* +----------------------+ | |
|
|
* | | | |
|
|
* | struct task_struct | | |
|
|
* current -> | | | |
|
|
* +----------------------+ -------
|
|
*
|
|
* Note that ar.ec is not saved explicitly in pt_reg or switch_stack.
|
|
* This is because ar.ec is saved as part of ar.pfs.
|
|
*/
|
|
|
|
|
|
#include <asm/fpu.h>
|
|
|
|
|
|
#ifndef __ASSEMBLY__
|
|
|
|
/*
|
|
* This struct defines the way the registers are saved on system
|
|
* calls.
|
|
*
|
|
* We don't save all floating point register because the kernel
|
|
* is compiled to use only a very small subset, so the other are
|
|
* untouched.
|
|
*
|
|
* THIS STRUCTURE MUST BE A MULTIPLE 16-BYTE IN SIZE
|
|
* (because the memory stack pointer MUST ALWAYS be aligned this way)
|
|
*
|
|
*/
|
|
struct pt_regs {
|
|
/* The following registers are saved by SAVE_MIN: */
|
|
unsigned long b6; /* scratch */
|
|
unsigned long b7; /* scratch */
|
|
|
|
unsigned long ar_csd; /* used by cmp8xchg16 (scratch) */
|
|
unsigned long ar_ssd; /* reserved for future use (scratch) */
|
|
|
|
unsigned long r8; /* scratch (return value register 0) */
|
|
unsigned long r9; /* scratch (return value register 1) */
|
|
unsigned long r10; /* scratch (return value register 2) */
|
|
unsigned long r11; /* scratch (return value register 3) */
|
|
|
|
unsigned long cr_ipsr; /* interrupted task's psr */
|
|
unsigned long cr_iip; /* interrupted task's instruction pointer */
|
|
/*
|
|
* interrupted task's function state; if bit 63 is cleared, it
|
|
* contains syscall's ar.pfs.pfm:
|
|
*/
|
|
unsigned long cr_ifs;
|
|
|
|
unsigned long ar_unat; /* interrupted task's NaT register (preserved) */
|
|
unsigned long ar_pfs; /* prev function state */
|
|
unsigned long ar_rsc; /* RSE configuration */
|
|
/* The following two are valid only if cr_ipsr.cpl > 0 || ti->flags & _TIF_MCA_INIT */
|
|
unsigned long ar_rnat; /* RSE NaT */
|
|
unsigned long ar_bspstore; /* RSE bspstore */
|
|
|
|
unsigned long pr; /* 64 predicate registers (1 bit each) */
|
|
unsigned long b0; /* return pointer (bp) */
|
|
unsigned long loadrs; /* size of dirty partition << 16 */
|
|
|
|
unsigned long r1; /* the gp pointer */
|
|
unsigned long r12; /* interrupted task's memory stack pointer */
|
|
unsigned long r13; /* thread pointer */
|
|
|
|
unsigned long ar_fpsr; /* floating point status (preserved) */
|
|
unsigned long r15; /* scratch */
|
|
|
|
/* The remaining registers are NOT saved for system calls. */
|
|
|
|
unsigned long r14; /* scratch */
|
|
unsigned long r2; /* scratch */
|
|
unsigned long r3; /* scratch */
|
|
|
|
/* The following registers are saved by SAVE_REST: */
|
|
unsigned long r16; /* scratch */
|
|
unsigned long r17; /* scratch */
|
|
unsigned long r18; /* scratch */
|
|
unsigned long r19; /* scratch */
|
|
unsigned long r20; /* scratch */
|
|
unsigned long r21; /* scratch */
|
|
unsigned long r22; /* scratch */
|
|
unsigned long r23; /* scratch */
|
|
unsigned long r24; /* scratch */
|
|
unsigned long r25; /* scratch */
|
|
unsigned long r26; /* scratch */
|
|
unsigned long r27; /* scratch */
|
|
unsigned long r28; /* scratch */
|
|
unsigned long r29; /* scratch */
|
|
unsigned long r30; /* scratch */
|
|
unsigned long r31; /* scratch */
|
|
|
|
unsigned long ar_ccv; /* compare/exchange value (scratch) */
|
|
|
|
/*
|
|
* Floating point registers that the kernel considers scratch:
|
|
*/
|
|
struct ia64_fpreg f6; /* scratch */
|
|
struct ia64_fpreg f7; /* scratch */
|
|
struct ia64_fpreg f8; /* scratch */
|
|
struct ia64_fpreg f9; /* scratch */
|
|
struct ia64_fpreg f10; /* scratch */
|
|
struct ia64_fpreg f11; /* scratch */
|
|
};
|
|
|
|
/*
|
|
* This structure contains the addition registers that need to
|
|
* preserved across a context switch. This generally consists of
|
|
* "preserved" registers.
|
|
*/
|
|
struct switch_stack {
|
|
unsigned long caller_unat; /* user NaT collection register (preserved) */
|
|
unsigned long ar_fpsr; /* floating-point status register */
|
|
|
|
struct ia64_fpreg f2; /* preserved */
|
|
struct ia64_fpreg f3; /* preserved */
|
|
struct ia64_fpreg f4; /* preserved */
|
|
struct ia64_fpreg f5; /* preserved */
|
|
|
|
struct ia64_fpreg f12; /* scratch, but untouched by kernel */
|
|
struct ia64_fpreg f13; /* scratch, but untouched by kernel */
|
|
struct ia64_fpreg f14; /* scratch, but untouched by kernel */
|
|
struct ia64_fpreg f15; /* scratch, but untouched by kernel */
|
|
struct ia64_fpreg f16; /* preserved */
|
|
struct ia64_fpreg f17; /* preserved */
|
|
struct ia64_fpreg f18; /* preserved */
|
|
struct ia64_fpreg f19; /* preserved */
|
|
struct ia64_fpreg f20; /* preserved */
|
|
struct ia64_fpreg f21; /* preserved */
|
|
struct ia64_fpreg f22; /* preserved */
|
|
struct ia64_fpreg f23; /* preserved */
|
|
struct ia64_fpreg f24; /* preserved */
|
|
struct ia64_fpreg f25; /* preserved */
|
|
struct ia64_fpreg f26; /* preserved */
|
|
struct ia64_fpreg f27; /* preserved */
|
|
struct ia64_fpreg f28; /* preserved */
|
|
struct ia64_fpreg f29; /* preserved */
|
|
struct ia64_fpreg f30; /* preserved */
|
|
struct ia64_fpreg f31; /* preserved */
|
|
|
|
unsigned long r4; /* preserved */
|
|
unsigned long r5; /* preserved */
|
|
unsigned long r6; /* preserved */
|
|
unsigned long r7; /* preserved */
|
|
|
|
unsigned long b0; /* so we can force a direct return in copy_thread */
|
|
unsigned long b1;
|
|
unsigned long b2;
|
|
unsigned long b3;
|
|
unsigned long b4;
|
|
unsigned long b5;
|
|
|
|
unsigned long ar_pfs; /* previous function state */
|
|
unsigned long ar_lc; /* loop counter (preserved) */
|
|
unsigned long ar_unat; /* NaT bits for r4-r7 */
|
|
unsigned long ar_rnat; /* RSE NaT collection register */
|
|
unsigned long ar_bspstore; /* RSE dirty base (preserved) */
|
|
unsigned long pr; /* 64 predicate registers (1 bit each) */
|
|
};
|
|
|
|
|
|
/* pt_all_user_regs is used for PTRACE_GETREGS PTRACE_SETREGS */
|
|
struct pt_all_user_regs {
|
|
unsigned long nat;
|
|
unsigned long cr_iip;
|
|
unsigned long cfm;
|
|
unsigned long cr_ipsr;
|
|
unsigned long pr;
|
|
|
|
unsigned long gr[32];
|
|
unsigned long br[8];
|
|
unsigned long ar[128];
|
|
struct ia64_fpreg fr[128];
|
|
};
|
|
|
|
#endif /* !__ASSEMBLY__ */
|
|
|
|
/* indices to application-registers array in pt_all_user_regs */
|
|
#define PT_AUR_RSC 16
|
|
#define PT_AUR_BSP 17
|
|
#define PT_AUR_BSPSTORE 18
|
|
#define PT_AUR_RNAT 19
|
|
#define PT_AUR_CCV 32
|
|
#define PT_AUR_UNAT 36
|
|
#define PT_AUR_FPSR 40
|
|
#define PT_AUR_PFS 64
|
|
#define PT_AUR_LC 65
|
|
#define PT_AUR_EC 66
|
|
|
|
/*
|
|
* The numbers chosen here are somewhat arbitrary but absolutely MUST
|
|
* not overlap with any of the number assigned in <linux/ptrace.h>.
|
|
*/
|
|
#define PTRACE_SINGLEBLOCK 12 /* resume execution until next branch */
|
|
#define PTRACE_OLD_GETSIGINFO 13 /* (replaced by PTRACE_GETSIGINFO in <linux/ptrace.h>) */
|
|
#define PTRACE_OLD_SETSIGINFO 14 /* (replaced by PTRACE_SETSIGINFO in <linux/ptrace.h>) */
|
|
#define PTRACE_GETREGS 18 /* get all registers (pt_all_user_regs) in one shot */
|
|
#define PTRACE_SETREGS 19 /* set all registers (pt_all_user_regs) in one shot */
|
|
|
|
#define PTRACE_OLDSETOPTIONS 21
|
|
|
|
#endif /* _UAPI_ASM_IA64_PTRACE_H */
|