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Many user space API headers are missing licensing information, which makes it hard for compliance tools to determine the correct license. By default are files without license information under the default license of the kernel, which is GPLV2. Marking them GPLV2 would exclude them from being included in non GPLV2 code, which is obviously not intended. The user space API headers fall under the syscall exception which is in the kernels COPYING file: NOTE! This copyright does *not* cover user programs that use kernel services by normal system calls - this is merely considered normal use of the kernel, and does *not* fall under the heading of "derived work". otherwise syscall usage would not be possible. Update the files which contain no license information with an SPDX license identifier. The chosen identifier is 'GPL-2.0 WITH Linux-syscall-note' which is the officially assigned identifier for the Linux syscall exception. SPDX license identifiers are a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. See the previous patch in this series for the methodology of how this patch was researched. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
126 lines
4.1 KiB
C
126 lines
4.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/*
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* Compiler-dependent intrinsics.
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*
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* Copyright (C) 2002-2003 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*/
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#ifndef _UAPI_ASM_IA64_INTRINSICS_H
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#define _UAPI_ASM_IA64_INTRINSICS_H
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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/* include compiler specific intrinsics */
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#include <asm/ia64regs.h>
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#ifdef __INTEL_COMPILER
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# include <asm/intel_intrin.h>
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#else
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# include <asm/gcc_intrin.h>
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#endif
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#include <asm/cmpxchg.h>
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#define ia64_native_get_psr_i() (ia64_native_getreg(_IA64_REG_PSR) & IA64_PSR_I)
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#define ia64_native_set_rr0_to_rr4(val0, val1, val2, val3, val4) \
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do { \
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ia64_native_set_rr(0x0000000000000000UL, (val0)); \
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ia64_native_set_rr(0x2000000000000000UL, (val1)); \
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ia64_native_set_rr(0x4000000000000000UL, (val2)); \
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ia64_native_set_rr(0x6000000000000000UL, (val3)); \
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ia64_native_set_rr(0x8000000000000000UL, (val4)); \
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} while (0)
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/*
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* Force an unresolved reference if someone tries to use
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* ia64_fetch_and_add() with a bad value.
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*/
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extern unsigned long __bad_size_for_ia64_fetch_and_add (void);
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extern unsigned long __bad_increment_for_ia64_fetch_and_add (void);
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#define IA64_FETCHADD(tmp,v,n,sz,sem) \
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({ \
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switch (sz) { \
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case 4: \
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tmp = ia64_fetchadd4_##sem((unsigned int *) v, n); \
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break; \
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\
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case 8: \
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tmp = ia64_fetchadd8_##sem((unsigned long *) v, n); \
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break; \
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\
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default: \
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__bad_size_for_ia64_fetch_and_add(); \
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} \
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})
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#define ia64_fetchadd(i,v,sem) \
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({ \
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__u64 _tmp; \
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volatile __typeof__(*(v)) *_v = (v); \
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/* Can't use a switch () here: gcc isn't always smart enough for that... */ \
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if ((i) == -16) \
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IA64_FETCHADD(_tmp, _v, -16, sizeof(*(v)), sem); \
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else if ((i) == -8) \
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IA64_FETCHADD(_tmp, _v, -8, sizeof(*(v)), sem); \
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else if ((i) == -4) \
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IA64_FETCHADD(_tmp, _v, -4, sizeof(*(v)), sem); \
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else if ((i) == -1) \
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IA64_FETCHADD(_tmp, _v, -1, sizeof(*(v)), sem); \
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else if ((i) == 1) \
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IA64_FETCHADD(_tmp, _v, 1, sizeof(*(v)), sem); \
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else if ((i) == 4) \
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IA64_FETCHADD(_tmp, _v, 4, sizeof(*(v)), sem); \
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else if ((i) == 8) \
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IA64_FETCHADD(_tmp, _v, 8, sizeof(*(v)), sem); \
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else if ((i) == 16) \
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IA64_FETCHADD(_tmp, _v, 16, sizeof(*(v)), sem); \
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else \
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_tmp = __bad_increment_for_ia64_fetch_and_add(); \
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(__typeof__(*(v))) (_tmp); /* return old value */ \
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})
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#define ia64_fetch_and_add(i,v) (ia64_fetchadd(i, v, rel) + (i)) /* return new value */
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#endif
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#ifndef __ASSEMBLY__
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#define IA64_INTRINSIC_API(name) ia64_native_ ## name
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#define IA64_INTRINSIC_MACRO(name) ia64_native_ ## name
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/************************************************/
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/* Instructions paravirtualized for correctness */
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/************************************************/
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/* fc, thash, get_cpuid, get_pmd, get_eflags, set_eflags */
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/* Note that "ttag" and "cover" are also privilege-sensitive; "ttag"
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* is not currently used (though it may be in a long-format VHPT system!)
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*/
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#define ia64_fc IA64_INTRINSIC_API(fc)
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#define ia64_thash IA64_INTRINSIC_API(thash)
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#define ia64_get_cpuid IA64_INTRINSIC_API(get_cpuid)
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#define ia64_get_pmd IA64_INTRINSIC_API(get_pmd)
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/************************************************/
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/* Instructions paravirtualized for performance */
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/************************************************/
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#define ia64_ssm IA64_INTRINSIC_MACRO(ssm)
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#define ia64_rsm IA64_INTRINSIC_MACRO(rsm)
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#define ia64_getreg IA64_INTRINSIC_MACRO(getreg)
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#define ia64_setreg IA64_INTRINSIC_API(setreg)
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#define ia64_set_rr IA64_INTRINSIC_API(set_rr)
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#define ia64_get_rr IA64_INTRINSIC_API(get_rr)
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#define ia64_ptcga IA64_INTRINSIC_API(ptcga)
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#define ia64_get_psr_i IA64_INTRINSIC_API(get_psr_i)
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#define ia64_intrin_local_irq_restore \
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IA64_INTRINSIC_API(intrin_local_irq_restore)
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#define ia64_set_rr0_to_rr4 IA64_INTRINSIC_API(set_rr0_to_rr4)
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#endif /* !__ASSEMBLY__ */
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#endif /* _UAPI_ASM_IA64_INTRINSICS_H */
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