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GPIO PIN control and access is done by direct phy manipulation. Here we add an aq_phy module which is able to access phy registers via MDIO access mailbox. Access is controlled via HW semaphore. Co-developed-by: Nikita Danilov <nikita.danilov@aquantia.com> Signed-off-by: Nikita Danilov <nikita.danilov@aquantia.com> Signed-off-by: Dmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
33 lines
815 B
C
33 lines
815 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* aQuantia Corporation Network Driver
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* Copyright (C) 2018-2019 aQuantia Corporation. All rights reserved
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*/
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#ifndef AQ_PHY_H
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#define AQ_PHY_H
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#include <linux/mdio.h>
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#include "hw_atl/hw_atl_llh.h"
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#include "hw_atl/hw_atl_llh_internal.h"
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#include "aq_hw_utils.h"
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#include "aq_hw.h"
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#define HW_ATL_PHY_ID_MAX 32U
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bool aq_mdio_busy_wait(struct aq_hw_s *aq_hw);
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u16 aq_mdio_read_word(struct aq_hw_s *aq_hw, u16 mmd, u16 addr);
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void aq_mdio_write_word(struct aq_hw_s *aq_hw, u16 mmd, u16 addr, u16 data);
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u16 aq_phy_read_reg(struct aq_hw_s *aq_hw, u16 mmd, u16 address);
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void aq_phy_write_reg(struct aq_hw_s *aq_hw, u16 mmd, u16 address, u16 data);
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bool aq_phy_init_phy_id(struct aq_hw_s *aq_hw);
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bool aq_phy_init(struct aq_hw_s *aq_hw);
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#endif /* AQ_PHY_H */
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