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8469391182
2D acceleration is only available on PSB and MRST and very slow on both platforms. CPU acceleration is faster so don't bother with 2D accel anymore. Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20201115175420.32167-1-patrik.r.jakobsson@gmail.com
61 lines
1.7 KiB
C
61 lines
1.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/**************************************************************************
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* Copyright (c) 2007-2011, Intel Corporation.
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* All Rights Reserved.
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*
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* Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
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* develop this driver.
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*
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**************************************************************************/
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#include <linux/console.h>
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <linux/tty.h>
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#include <drm/drm.h>
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#include <drm/drm_crtc.h>
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#include <drm/drm_fb_helper.h>
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#include <drm/drm_fourcc.h>
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#include "psb_drv.h"
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#include "psb_reg.h"
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/**
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* psb_spank - reset the 2D engine
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* @dev_priv: our PSB DRM device
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*
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* Soft reset the graphics engine and then reload the necessary registers.
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* We use this at initialisation time but it will become relevant for
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* accelerated X later
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*/
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void psb_spank(struct drm_psb_private *dev_priv)
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{
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PSB_WSGX32(_PSB_CS_RESET_BIF_RESET | _PSB_CS_RESET_DPM_RESET |
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_PSB_CS_RESET_TA_RESET | _PSB_CS_RESET_USE_RESET |
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_PSB_CS_RESET_ISP_RESET | _PSB_CS_RESET_TSP_RESET |
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_PSB_CS_RESET_TWOD_RESET, PSB_CR_SOFT_RESET);
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PSB_RSGX32(PSB_CR_SOFT_RESET);
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msleep(1);
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PSB_WSGX32(0, PSB_CR_SOFT_RESET);
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wmb();
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PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_CB_CTRL_CLEAR_FAULT,
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PSB_CR_BIF_CTRL);
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wmb();
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(void) PSB_RSGX32(PSB_CR_BIF_CTRL);
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msleep(1);
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PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_CB_CTRL_CLEAR_FAULT,
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PSB_CR_BIF_CTRL);
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(void) PSB_RSGX32(PSB_CR_BIF_CTRL);
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PSB_WSGX32(dev_priv->gtt.gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
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}
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