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d8a66f3621
These drivers don't use the driver_data member of struct i2c_device_id, so don't explicitly initialize this member. This prepares putting driver_data in an anonymous union which requires either no initialization or named designators. But it's also a nice cleanup on its own. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20240430085654.1028864-2-u.kleine-koenig@pengutronix.de Signed-off-by: Guenter Roeck <linux@roeck-us.net>
1054 lines
27 KiB
C
1054 lines
27 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* INA3221 Triple Current/Voltage Monitor
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*
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* Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
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* Andrew F. Davis <afd@ti.com>
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*/
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#include <linux/debugfs.h>
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#include <linux/hwmon.h>
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#include <linux/hwmon-sysfs.h>
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#include <linux/i2c.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/of.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <linux/util_macros.h>
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#define INA3221_DRIVER_NAME "ina3221"
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#define INA3221_CONFIG 0x00
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#define INA3221_SHUNT1 0x01
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#define INA3221_BUS1 0x02
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#define INA3221_SHUNT2 0x03
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#define INA3221_BUS2 0x04
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#define INA3221_SHUNT3 0x05
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#define INA3221_BUS3 0x06
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#define INA3221_CRIT1 0x07
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#define INA3221_WARN1 0x08
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#define INA3221_CRIT2 0x09
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#define INA3221_WARN2 0x0a
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#define INA3221_CRIT3 0x0b
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#define INA3221_WARN3 0x0c
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#define INA3221_SHUNT_SUM 0x0d
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#define INA3221_CRIT_SUM 0x0e
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#define INA3221_MASK_ENABLE 0x0f
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#define INA3221_CONFIG_MODE_MASK GENMASK(2, 0)
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#define INA3221_CONFIG_MODE_POWERDOWN 0
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#define INA3221_CONFIG_MODE_SHUNT BIT(0)
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#define INA3221_CONFIG_MODE_BUS BIT(1)
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#define INA3221_CONFIG_MODE_CONTINUOUS BIT(2)
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#define INA3221_CONFIG_VSH_CT_SHIFT 3
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#define INA3221_CONFIG_VSH_CT_MASK GENMASK(5, 3)
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#define INA3221_CONFIG_VSH_CT(x) (((x) & GENMASK(5, 3)) >> 3)
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#define INA3221_CONFIG_VBUS_CT_SHIFT 6
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#define INA3221_CONFIG_VBUS_CT_MASK GENMASK(8, 6)
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#define INA3221_CONFIG_VBUS_CT(x) (((x) & GENMASK(8, 6)) >> 6)
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#define INA3221_CONFIG_AVG_SHIFT 9
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#define INA3221_CONFIG_AVG_MASK GENMASK(11, 9)
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#define INA3221_CONFIG_AVG(x) (((x) & GENMASK(11, 9)) >> 9)
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#define INA3221_CONFIG_CHs_EN_MASK GENMASK(14, 12)
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#define INA3221_CONFIG_CHx_EN(x) BIT(14 - (x))
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#define INA3221_MASK_ENABLE_SCC_MASK GENMASK(14, 12)
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#define INA3221_CONFIG_DEFAULT 0x7127
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#define INA3221_RSHUNT_DEFAULT 10000
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enum ina3221_fields {
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/* Configuration */
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F_RST,
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/* Status Flags */
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F_CVRF,
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/* Warning Flags */
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F_WF3, F_WF2, F_WF1,
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/* Alert Flags: SF is the summation-alert flag */
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F_SF, F_CF3, F_CF2, F_CF1,
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/* sentinel */
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F_MAX_FIELDS
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};
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static const struct reg_field ina3221_reg_fields[] = {
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[F_RST] = REG_FIELD(INA3221_CONFIG, 15, 15),
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[F_CVRF] = REG_FIELD(INA3221_MASK_ENABLE, 0, 0),
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[F_WF3] = REG_FIELD(INA3221_MASK_ENABLE, 3, 3),
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[F_WF2] = REG_FIELD(INA3221_MASK_ENABLE, 4, 4),
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[F_WF1] = REG_FIELD(INA3221_MASK_ENABLE, 5, 5),
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[F_SF] = REG_FIELD(INA3221_MASK_ENABLE, 6, 6),
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[F_CF3] = REG_FIELD(INA3221_MASK_ENABLE, 7, 7),
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[F_CF2] = REG_FIELD(INA3221_MASK_ENABLE, 8, 8),
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[F_CF1] = REG_FIELD(INA3221_MASK_ENABLE, 9, 9),
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};
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enum ina3221_channels {
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INA3221_CHANNEL1,
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INA3221_CHANNEL2,
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INA3221_CHANNEL3,
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INA3221_NUM_CHANNELS
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};
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/**
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* struct ina3221_input - channel input source specific information
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* @label: label of channel input source
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* @shunt_resistor: shunt resistor value of channel input source
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* @disconnected: connection status of channel input source
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* @summation_disable: channel summation status of input source
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*/
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struct ina3221_input {
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const char *label;
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int shunt_resistor;
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bool disconnected;
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bool summation_disable;
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};
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/**
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* struct ina3221_data - device specific information
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* @pm_dev: Device pointer for pm runtime
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* @regmap: Register map of the device
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* @fields: Register fields of the device
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* @inputs: Array of channel input source specific structures
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* @lock: mutex lock to serialize sysfs attribute accesses
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* @debugfs: Pointer to debugfs entry for device
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* @reg_config: Register value of INA3221_CONFIG
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* @summation_shunt_resistor: equivalent shunt resistor value for summation
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* @summation_channel_control: Value written to SCC field in INA3221_MASK_ENABLE
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* @single_shot: running in single-shot operating mode
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*/
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struct ina3221_data {
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struct device *pm_dev;
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struct regmap *regmap;
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struct regmap_field *fields[F_MAX_FIELDS];
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struct ina3221_input inputs[INA3221_NUM_CHANNELS];
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struct mutex lock;
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struct dentry *debugfs;
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u32 reg_config;
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int summation_shunt_resistor;
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u32 summation_channel_control;
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bool single_shot;
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};
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static inline bool ina3221_is_enabled(struct ina3221_data *ina, int channel)
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{
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/* Summation channel checks shunt resistor values */
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if (channel > INA3221_CHANNEL3)
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return ina->summation_shunt_resistor != 0;
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return pm_runtime_active(ina->pm_dev) &&
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(ina->reg_config & INA3221_CONFIG_CHx_EN(channel));
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}
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/*
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* Helper function to return the resistor value for current summation.
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*
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* There is a condition to calculate current summation -- all the shunt
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* resistor values should be the same, so as to simply fit the formula:
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* current summation = shunt voltage summation / shunt resistor
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*
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* Returns the equivalent shunt resistor value on success or 0 on failure
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*/
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static inline int ina3221_summation_shunt_resistor(struct ina3221_data *ina)
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{
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struct ina3221_input *input = ina->inputs;
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int i, shunt_resistor = 0;
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for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
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if (input[i].disconnected || !input[i].shunt_resistor ||
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input[i].summation_disable)
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continue;
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if (!shunt_resistor) {
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/* Found the reference shunt resistor value */
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shunt_resistor = input[i].shunt_resistor;
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} else {
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/* No summation if resistor values are different */
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if (shunt_resistor != input[i].shunt_resistor)
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return 0;
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}
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}
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return shunt_resistor;
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}
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/* Lookup table for Bus and Shunt conversion times in usec */
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static const u16 ina3221_conv_time[] = {
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140, 204, 332, 588, 1100, 2116, 4156, 8244,
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};
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/* Lookup table for number of samples using in averaging mode */
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static const int ina3221_avg_samples[] = {
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1, 4, 16, 64, 128, 256, 512, 1024,
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};
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/* Converting update_interval in msec to conversion time in usec */
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static inline u32 ina3221_interval_ms_to_conv_time(u16 config, int interval)
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{
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u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK);
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u32 samples_idx = INA3221_CONFIG_AVG(config);
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u32 samples = ina3221_avg_samples[samples_idx];
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/* Bisect the result to Bus and Shunt conversion times */
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return DIV_ROUND_CLOSEST(interval * 1000 / 2, channels * samples);
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}
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/* Converting CONFIG register value to update_interval in usec */
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static inline u32 ina3221_reg_to_interval_us(u16 config)
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{
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u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK);
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u32 vbus_ct_idx = INA3221_CONFIG_VBUS_CT(config);
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u32 vsh_ct_idx = INA3221_CONFIG_VSH_CT(config);
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u32 vbus_ct = ina3221_conv_time[vbus_ct_idx];
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u32 vsh_ct = ina3221_conv_time[vsh_ct_idx];
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/* Calculate total conversion time */
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return channels * (vbus_ct + vsh_ct);
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}
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static inline int ina3221_wait_for_data(struct ina3221_data *ina)
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{
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u32 wait, cvrf;
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wait = ina3221_reg_to_interval_us(ina->reg_config);
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/* Polling the CVRF bit to make sure read data is ready */
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return regmap_field_read_poll_timeout(ina->fields[F_CVRF],
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cvrf, cvrf, wait, wait * 2);
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}
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static int ina3221_read_value(struct ina3221_data *ina, unsigned int reg,
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int *val)
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{
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unsigned int regval;
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int ret;
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ret = regmap_read(ina->regmap, reg, ®val);
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if (ret)
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return ret;
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/*
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* Shunt Voltage Sum register has 14-bit value with 1-bit shift
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* Other Shunt Voltage registers have 12 bits with 3-bit shift
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*/
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if (reg == INA3221_SHUNT_SUM || reg == INA3221_CRIT_SUM)
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*val = sign_extend32(regval >> 1, 14);
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else
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*val = sign_extend32(regval >> 3, 12);
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return 0;
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}
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static const u8 ina3221_in_reg[] = {
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INA3221_BUS1,
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INA3221_BUS2,
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INA3221_BUS3,
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INA3221_SHUNT1,
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INA3221_SHUNT2,
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INA3221_SHUNT3,
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INA3221_SHUNT_SUM,
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};
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static int ina3221_read_chip(struct device *dev, u32 attr, long *val)
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{
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struct ina3221_data *ina = dev_get_drvdata(dev);
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int regval;
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switch (attr) {
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case hwmon_chip_samples:
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regval = INA3221_CONFIG_AVG(ina->reg_config);
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*val = ina3221_avg_samples[regval];
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return 0;
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case hwmon_chip_update_interval:
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/* Return in msec */
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*val = ina3221_reg_to_interval_us(ina->reg_config);
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*val = DIV_ROUND_CLOSEST(*val, 1000);
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return 0;
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default:
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return -EOPNOTSUPP;
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}
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}
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static int ina3221_read_in(struct device *dev, u32 attr, int channel, long *val)
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{
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const bool is_shunt = channel > INA3221_CHANNEL3;
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struct ina3221_data *ina = dev_get_drvdata(dev);
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u8 reg = ina3221_in_reg[channel];
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int regval, ret;
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/*
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* Translate shunt channel index to sensor channel index except
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* the 7th channel (6 since being 0-aligned) is for summation.
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*/
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if (channel != 6)
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channel %= INA3221_NUM_CHANNELS;
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switch (attr) {
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case hwmon_in_input:
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if (!ina3221_is_enabled(ina, channel))
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return -ENODATA;
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/* Write CONFIG register to trigger a single-shot measurement */
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if (ina->single_shot) {
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regmap_write(ina->regmap, INA3221_CONFIG,
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ina->reg_config);
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ret = ina3221_wait_for_data(ina);
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if (ret)
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return ret;
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}
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ret = ina3221_read_value(ina, reg, ®val);
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if (ret)
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return ret;
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/*
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* Scale of shunt voltage (uV): LSB is 40uV
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* Scale of bus voltage (mV): LSB is 8mV
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*/
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*val = regval * (is_shunt ? 40 : 8);
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return 0;
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case hwmon_in_enable:
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*val = ina3221_is_enabled(ina, channel);
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return 0;
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default:
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return -EOPNOTSUPP;
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}
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}
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static const u8 ina3221_curr_reg[][INA3221_NUM_CHANNELS + 1] = {
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[hwmon_curr_input] = { INA3221_SHUNT1, INA3221_SHUNT2,
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INA3221_SHUNT3, INA3221_SHUNT_SUM },
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[hwmon_curr_max] = { INA3221_WARN1, INA3221_WARN2, INA3221_WARN3, 0 },
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[hwmon_curr_crit] = { INA3221_CRIT1, INA3221_CRIT2,
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INA3221_CRIT3, INA3221_CRIT_SUM },
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[hwmon_curr_max_alarm] = { F_WF1, F_WF2, F_WF3, 0 },
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[hwmon_curr_crit_alarm] = { F_CF1, F_CF2, F_CF3, F_SF },
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};
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static int ina3221_read_curr(struct device *dev, u32 attr,
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int channel, long *val)
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{
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struct ina3221_data *ina = dev_get_drvdata(dev);
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struct ina3221_input *input = ina->inputs;
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u8 reg = ina3221_curr_reg[attr][channel];
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int resistance_uo, voltage_nv;
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int regval, ret;
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if (channel > INA3221_CHANNEL3)
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resistance_uo = ina->summation_shunt_resistor;
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else
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resistance_uo = input[channel].shunt_resistor;
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switch (attr) {
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case hwmon_curr_input:
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if (!ina3221_is_enabled(ina, channel))
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return -ENODATA;
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/* Write CONFIG register to trigger a single-shot measurement */
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if (ina->single_shot) {
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regmap_write(ina->regmap, INA3221_CONFIG,
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ina->reg_config);
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ret = ina3221_wait_for_data(ina);
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if (ret)
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return ret;
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}
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fallthrough;
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case hwmon_curr_crit:
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case hwmon_curr_max:
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if (!resistance_uo)
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return -ENODATA;
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ret = ina3221_read_value(ina, reg, ®val);
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if (ret)
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return ret;
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/* Scale of shunt voltage: LSB is 40uV (40000nV) */
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voltage_nv = regval * 40000;
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/* Return current in mA */
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*val = DIV_ROUND_CLOSEST(voltage_nv, resistance_uo);
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return 0;
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case hwmon_curr_crit_alarm:
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case hwmon_curr_max_alarm:
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/* No actual register read if channel is disabled */
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if (!ina3221_is_enabled(ina, channel)) {
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/* Return 0 for alert flags */
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*val = 0;
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return 0;
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}
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ret = regmap_field_read(ina->fields[reg], ®val);
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if (ret)
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return ret;
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*val = regval;
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return 0;
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default:
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return -EOPNOTSUPP;
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}
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}
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static int ina3221_write_chip(struct device *dev, u32 attr, long val)
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{
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struct ina3221_data *ina = dev_get_drvdata(dev);
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int ret, idx;
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u32 tmp;
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switch (attr) {
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case hwmon_chip_samples:
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idx = find_closest(val, ina3221_avg_samples,
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ARRAY_SIZE(ina3221_avg_samples));
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tmp = (ina->reg_config & ~INA3221_CONFIG_AVG_MASK) |
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(idx << INA3221_CONFIG_AVG_SHIFT);
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ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);
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if (ret)
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return ret;
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/* Update reg_config accordingly */
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ina->reg_config = tmp;
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return 0;
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case hwmon_chip_update_interval:
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tmp = ina3221_interval_ms_to_conv_time(ina->reg_config, val);
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idx = find_closest(tmp, ina3221_conv_time,
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ARRAY_SIZE(ina3221_conv_time));
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/* Update Bus and Shunt voltage conversion times */
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tmp = INA3221_CONFIG_VBUS_CT_MASK | INA3221_CONFIG_VSH_CT_MASK;
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tmp = (ina->reg_config & ~tmp) |
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(idx << INA3221_CONFIG_VBUS_CT_SHIFT) |
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(idx << INA3221_CONFIG_VSH_CT_SHIFT);
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ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);
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if (ret)
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return ret;
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/* Update reg_config accordingly */
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ina->reg_config = tmp;
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return 0;
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default:
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return -EOPNOTSUPP;
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}
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}
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static int ina3221_write_curr(struct device *dev, u32 attr,
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int channel, long val)
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{
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struct ina3221_data *ina = dev_get_drvdata(dev);
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struct ina3221_input *input = ina->inputs;
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u8 reg = ina3221_curr_reg[attr][channel];
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int resistance_uo, current_ma, voltage_uv;
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int regval;
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if (channel > INA3221_CHANNEL3)
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resistance_uo = ina->summation_shunt_resistor;
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else
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resistance_uo = input[channel].shunt_resistor;
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if (!resistance_uo)
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return -EOPNOTSUPP;
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/* clamp current */
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current_ma = clamp_val(val,
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INT_MIN / resistance_uo,
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INT_MAX / resistance_uo);
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voltage_uv = DIV_ROUND_CLOSEST(current_ma * resistance_uo, 1000);
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/* clamp voltage */
|
|
voltage_uv = clamp_val(voltage_uv, -163800, 163800);
|
|
|
|
/*
|
|
* Formula to convert voltage_uv to register value:
|
|
* regval = (voltage_uv / scale) << shift
|
|
* Note:
|
|
* The scale is 40uV for all shunt voltage registers
|
|
* Shunt Voltage Sum register left-shifts 1 bit
|
|
* All other Shunt Voltage registers shift 3 bits
|
|
* Results:
|
|
* SHUNT_SUM: (1 / 40uV) << 1 = 1 / 20uV
|
|
* SHUNT[1-3]: (1 / 40uV) << 3 = 1 / 5uV
|
|
*/
|
|
if (reg == INA3221_SHUNT_SUM || reg == INA3221_CRIT_SUM)
|
|
regval = DIV_ROUND_CLOSEST(voltage_uv, 20) & 0xfffe;
|
|
else
|
|
regval = DIV_ROUND_CLOSEST(voltage_uv, 5) & 0xfff8;
|
|
|
|
return regmap_write(ina->regmap, reg, regval);
|
|
}
|
|
|
|
static int ina3221_write_enable(struct device *dev, int channel, bool enable)
|
|
{
|
|
struct ina3221_data *ina = dev_get_drvdata(dev);
|
|
u16 config, mask = INA3221_CONFIG_CHx_EN(channel);
|
|
u16 config_old = ina->reg_config & mask;
|
|
u32 tmp;
|
|
int ret;
|
|
|
|
config = enable ? mask : 0;
|
|
|
|
/* Bypass if enable status is not being changed */
|
|
if (config_old == config)
|
|
return 0;
|
|
|
|
/* For enabling routine, increase refcount and resume() at first */
|
|
if (enable) {
|
|
ret = pm_runtime_resume_and_get(ina->pm_dev);
|
|
if (ret < 0) {
|
|
dev_err(dev, "Failed to get PM runtime\n");
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
/* Enable or disable the channel */
|
|
tmp = (ina->reg_config & ~mask) | (config & mask);
|
|
ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);
|
|
if (ret)
|
|
goto fail;
|
|
|
|
/* Cache the latest config register value */
|
|
ina->reg_config = tmp;
|
|
|
|
/* For disabling routine, decrease refcount or suspend() at last */
|
|
if (!enable)
|
|
pm_runtime_put_sync(ina->pm_dev);
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
if (enable) {
|
|
dev_err(dev, "Failed to enable channel %d: error %d\n",
|
|
channel, ret);
|
|
pm_runtime_put_sync(ina->pm_dev);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ina3221_read(struct device *dev, enum hwmon_sensor_types type,
|
|
u32 attr, int channel, long *val)
|
|
{
|
|
struct ina3221_data *ina = dev_get_drvdata(dev);
|
|
int ret;
|
|
|
|
mutex_lock(&ina->lock);
|
|
|
|
switch (type) {
|
|
case hwmon_chip:
|
|
ret = ina3221_read_chip(dev, attr, val);
|
|
break;
|
|
case hwmon_in:
|
|
/* 0-align channel ID */
|
|
ret = ina3221_read_in(dev, attr, channel - 1, val);
|
|
break;
|
|
case hwmon_curr:
|
|
ret = ina3221_read_curr(dev, attr, channel, val);
|
|
break;
|
|
default:
|
|
ret = -EOPNOTSUPP;
|
|
break;
|
|
}
|
|
|
|
mutex_unlock(&ina->lock);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ina3221_write(struct device *dev, enum hwmon_sensor_types type,
|
|
u32 attr, int channel, long val)
|
|
{
|
|
struct ina3221_data *ina = dev_get_drvdata(dev);
|
|
int ret;
|
|
|
|
mutex_lock(&ina->lock);
|
|
|
|
switch (type) {
|
|
case hwmon_chip:
|
|
ret = ina3221_write_chip(dev, attr, val);
|
|
break;
|
|
case hwmon_in:
|
|
/* 0-align channel ID */
|
|
ret = ina3221_write_enable(dev, channel - 1, val);
|
|
break;
|
|
case hwmon_curr:
|
|
ret = ina3221_write_curr(dev, attr, channel, val);
|
|
break;
|
|
default:
|
|
ret = -EOPNOTSUPP;
|
|
break;
|
|
}
|
|
|
|
mutex_unlock(&ina->lock);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ina3221_read_string(struct device *dev, enum hwmon_sensor_types type,
|
|
u32 attr, int channel, const char **str)
|
|
{
|
|
struct ina3221_data *ina = dev_get_drvdata(dev);
|
|
int index = channel - 1;
|
|
|
|
if (channel == 7)
|
|
*str = "sum of shunt voltages";
|
|
else
|
|
*str = ina->inputs[index].label;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static umode_t ina3221_is_visible(const void *drvdata,
|
|
enum hwmon_sensor_types type,
|
|
u32 attr, int channel)
|
|
{
|
|
const struct ina3221_data *ina = drvdata;
|
|
const struct ina3221_input *input = NULL;
|
|
|
|
switch (type) {
|
|
case hwmon_chip:
|
|
switch (attr) {
|
|
case hwmon_chip_samples:
|
|
case hwmon_chip_update_interval:
|
|
return 0644;
|
|
default:
|
|
return 0;
|
|
}
|
|
case hwmon_in:
|
|
/* Ignore in0_ */
|
|
if (channel == 0)
|
|
return 0;
|
|
|
|
switch (attr) {
|
|
case hwmon_in_label:
|
|
if (channel - 1 <= INA3221_CHANNEL3)
|
|
input = &ina->inputs[channel - 1];
|
|
else if (channel == 7)
|
|
return 0444;
|
|
/* Hide label node if label is not provided */
|
|
return (input && input->label) ? 0444 : 0;
|
|
case hwmon_in_input:
|
|
return 0444;
|
|
case hwmon_in_enable:
|
|
return 0644;
|
|
default:
|
|
return 0;
|
|
}
|
|
case hwmon_curr:
|
|
switch (attr) {
|
|
case hwmon_curr_input:
|
|
case hwmon_curr_crit_alarm:
|
|
case hwmon_curr_max_alarm:
|
|
return 0444;
|
|
case hwmon_curr_crit:
|
|
case hwmon_curr_max:
|
|
return 0644;
|
|
default:
|
|
return 0;
|
|
}
|
|
default:
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
#define INA3221_HWMON_CURR_CONFIG (HWMON_C_INPUT | \
|
|
HWMON_C_CRIT | HWMON_C_CRIT_ALARM | \
|
|
HWMON_C_MAX | HWMON_C_MAX_ALARM)
|
|
|
|
static const struct hwmon_channel_info * const ina3221_info[] = {
|
|
HWMON_CHANNEL_INFO(chip,
|
|
HWMON_C_SAMPLES,
|
|
HWMON_C_UPDATE_INTERVAL),
|
|
HWMON_CHANNEL_INFO(in,
|
|
/* 0: dummy, skipped in is_visible */
|
|
HWMON_I_INPUT,
|
|
/* 1-3: input voltage Channels */
|
|
HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
|
|
HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
|
|
HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
|
|
/* 4-6: shunt voltage Channels */
|
|
HWMON_I_INPUT,
|
|
HWMON_I_INPUT,
|
|
HWMON_I_INPUT,
|
|
/* 7: summation of shunt voltage channels */
|
|
HWMON_I_INPUT | HWMON_I_LABEL),
|
|
HWMON_CHANNEL_INFO(curr,
|
|
/* 1-3: current channels*/
|
|
INA3221_HWMON_CURR_CONFIG,
|
|
INA3221_HWMON_CURR_CONFIG,
|
|
INA3221_HWMON_CURR_CONFIG,
|
|
/* 4: summation of current channels */
|
|
HWMON_C_INPUT | HWMON_C_CRIT | HWMON_C_CRIT_ALARM),
|
|
NULL
|
|
};
|
|
|
|
static const struct hwmon_ops ina3221_hwmon_ops = {
|
|
.is_visible = ina3221_is_visible,
|
|
.read_string = ina3221_read_string,
|
|
.read = ina3221_read,
|
|
.write = ina3221_write,
|
|
};
|
|
|
|
static const struct hwmon_chip_info ina3221_chip_info = {
|
|
.ops = &ina3221_hwmon_ops,
|
|
.info = ina3221_info,
|
|
};
|
|
|
|
/* Extra attribute groups */
|
|
static ssize_t ina3221_shunt_show(struct device *dev,
|
|
struct device_attribute *attr, char *buf)
|
|
{
|
|
struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr);
|
|
struct ina3221_data *ina = dev_get_drvdata(dev);
|
|
unsigned int channel = sd_attr->index;
|
|
struct ina3221_input *input = &ina->inputs[channel];
|
|
|
|
return sysfs_emit(buf, "%d\n", input->shunt_resistor);
|
|
}
|
|
|
|
static ssize_t ina3221_shunt_store(struct device *dev,
|
|
struct device_attribute *attr,
|
|
const char *buf, size_t count)
|
|
{
|
|
struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr);
|
|
struct ina3221_data *ina = dev_get_drvdata(dev);
|
|
unsigned int channel = sd_attr->index;
|
|
struct ina3221_input *input = &ina->inputs[channel];
|
|
int val;
|
|
int ret;
|
|
|
|
ret = kstrtoint(buf, 0, &val);
|
|
if (ret)
|
|
return ret;
|
|
|
|
val = clamp_val(val, 1, INT_MAX);
|
|
|
|
input->shunt_resistor = val;
|
|
|
|
/* Update summation_shunt_resistor for summation channel */
|
|
ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina);
|
|
|
|
return count;
|
|
}
|
|
|
|
/* shunt resistance */
|
|
static SENSOR_DEVICE_ATTR_RW(shunt1_resistor, ina3221_shunt, INA3221_CHANNEL1);
|
|
static SENSOR_DEVICE_ATTR_RW(shunt2_resistor, ina3221_shunt, INA3221_CHANNEL2);
|
|
static SENSOR_DEVICE_ATTR_RW(shunt3_resistor, ina3221_shunt, INA3221_CHANNEL3);
|
|
|
|
static struct attribute *ina3221_attrs[] = {
|
|
&sensor_dev_attr_shunt1_resistor.dev_attr.attr,
|
|
&sensor_dev_attr_shunt2_resistor.dev_attr.attr,
|
|
&sensor_dev_attr_shunt3_resistor.dev_attr.attr,
|
|
NULL,
|
|
};
|
|
ATTRIBUTE_GROUPS(ina3221);
|
|
|
|
static const struct regmap_range ina3221_yes_ranges[] = {
|
|
regmap_reg_range(INA3221_CONFIG, INA3221_BUS3),
|
|
regmap_reg_range(INA3221_SHUNT_SUM, INA3221_SHUNT_SUM),
|
|
regmap_reg_range(INA3221_MASK_ENABLE, INA3221_MASK_ENABLE),
|
|
};
|
|
|
|
static const struct regmap_access_table ina3221_volatile_table = {
|
|
.yes_ranges = ina3221_yes_ranges,
|
|
.n_yes_ranges = ARRAY_SIZE(ina3221_yes_ranges),
|
|
};
|
|
|
|
static const struct regmap_config ina3221_regmap_config = {
|
|
.reg_bits = 8,
|
|
.val_bits = 16,
|
|
|
|
.cache_type = REGCACHE_MAPLE,
|
|
.volatile_table = &ina3221_volatile_table,
|
|
};
|
|
|
|
static int ina3221_probe_child_from_dt(struct device *dev,
|
|
struct device_node *child,
|
|
struct ina3221_data *ina)
|
|
{
|
|
struct ina3221_input *input;
|
|
u32 val;
|
|
int ret;
|
|
|
|
ret = of_property_read_u32(child, "reg", &val);
|
|
if (ret) {
|
|
dev_err(dev, "missing reg property of %pOFn\n", child);
|
|
return ret;
|
|
} else if (val > INA3221_CHANNEL3) {
|
|
dev_err(dev, "invalid reg %d of %pOFn\n", val, child);
|
|
return -EINVAL;
|
|
}
|
|
|
|
input = &ina->inputs[val];
|
|
|
|
/* Log the disconnected channel input */
|
|
if (!of_device_is_available(child)) {
|
|
input->disconnected = true;
|
|
return 0;
|
|
}
|
|
|
|
/* Save the connected input label if available */
|
|
of_property_read_string(child, "label", &input->label);
|
|
|
|
/* summation channel control */
|
|
input->summation_disable = of_property_read_bool(child, "ti,summation-disable");
|
|
|
|
/* Overwrite default shunt resistor value optionally */
|
|
if (!of_property_read_u32(child, "shunt-resistor-micro-ohms", &val)) {
|
|
if (val < 1 || val > INT_MAX) {
|
|
dev_err(dev, "invalid shunt resistor value %u of %pOFn\n",
|
|
val, child);
|
|
return -EINVAL;
|
|
}
|
|
input->shunt_resistor = val;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ina3221_probe_from_dt(struct device *dev, struct ina3221_data *ina)
|
|
{
|
|
const struct device_node *np = dev->of_node;
|
|
struct device_node *child;
|
|
int ret;
|
|
|
|
/* Compatible with non-DT platforms */
|
|
if (!np)
|
|
return 0;
|
|
|
|
ina->single_shot = of_property_read_bool(np, "ti,single-shot");
|
|
|
|
for_each_child_of_node(np, child) {
|
|
ret = ina3221_probe_child_from_dt(dev, child, ina);
|
|
if (ret) {
|
|
of_node_put(child);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ina3221_probe(struct i2c_client *client)
|
|
{
|
|
struct device *dev = &client->dev;
|
|
struct ina3221_data *ina;
|
|
struct device *hwmon_dev;
|
|
char name[32];
|
|
int i, ret;
|
|
|
|
ina = devm_kzalloc(dev, sizeof(*ina), GFP_KERNEL);
|
|
if (!ina)
|
|
return -ENOMEM;
|
|
|
|
ina->regmap = devm_regmap_init_i2c(client, &ina3221_regmap_config);
|
|
if (IS_ERR(ina->regmap)) {
|
|
dev_err(dev, "Unable to allocate register map\n");
|
|
return PTR_ERR(ina->regmap);
|
|
}
|
|
|
|
for (i = 0; i < F_MAX_FIELDS; i++) {
|
|
ina->fields[i] = devm_regmap_field_alloc(dev,
|
|
ina->regmap,
|
|
ina3221_reg_fields[i]);
|
|
if (IS_ERR(ina->fields[i])) {
|
|
dev_err(dev, "Unable to allocate regmap fields\n");
|
|
return PTR_ERR(ina->fields[i]);
|
|
}
|
|
}
|
|
|
|
for (i = 0; i < INA3221_NUM_CHANNELS; i++)
|
|
ina->inputs[i].shunt_resistor = INA3221_RSHUNT_DEFAULT;
|
|
|
|
ret = ina3221_probe_from_dt(dev, ina);
|
|
if (ret) {
|
|
dev_err(dev, "Unable to probe from device tree\n");
|
|
return ret;
|
|
}
|
|
|
|
/* The driver will be reset, so use reset value */
|
|
ina->reg_config = INA3221_CONFIG_DEFAULT;
|
|
|
|
/* Clear continuous bit to use single-shot mode */
|
|
if (ina->single_shot)
|
|
ina->reg_config &= ~INA3221_CONFIG_MODE_CONTINUOUS;
|
|
|
|
/* Disable channels if their inputs are disconnected */
|
|
for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
|
|
if (ina->inputs[i].disconnected)
|
|
ina->reg_config &= ~INA3221_CONFIG_CHx_EN(i);
|
|
}
|
|
|
|
/* Initialize summation_shunt_resistor for summation channel control */
|
|
ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina);
|
|
for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
|
|
if (!ina->inputs[i].summation_disable)
|
|
ina->summation_channel_control |= BIT(14 - i);
|
|
}
|
|
|
|
ina->pm_dev = dev;
|
|
mutex_init(&ina->lock);
|
|
dev_set_drvdata(dev, ina);
|
|
|
|
/* Enable PM runtime -- status is suspended by default */
|
|
pm_runtime_enable(ina->pm_dev);
|
|
|
|
/* Initialize (resume) the device */
|
|
for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
|
|
if (ina->inputs[i].disconnected)
|
|
continue;
|
|
/* Match the refcount with number of enabled channels */
|
|
ret = pm_runtime_get_sync(ina->pm_dev);
|
|
if (ret < 0)
|
|
goto fail;
|
|
}
|
|
|
|
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, ina,
|
|
&ina3221_chip_info,
|
|
ina3221_groups);
|
|
if (IS_ERR(hwmon_dev)) {
|
|
dev_err(dev, "Unable to register hwmon device\n");
|
|
ret = PTR_ERR(hwmon_dev);
|
|
goto fail;
|
|
}
|
|
|
|
scnprintf(name, sizeof(name), "%s-%s", INA3221_DRIVER_NAME, dev_name(dev));
|
|
ina->debugfs = debugfs_create_dir(name, NULL);
|
|
|
|
for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
|
|
scnprintf(name, sizeof(name), "in%d_summation_disable", i);
|
|
debugfs_create_bool(name, 0400, ina->debugfs,
|
|
&ina->inputs[i].summation_disable);
|
|
}
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
pm_runtime_disable(ina->pm_dev);
|
|
pm_runtime_set_suspended(ina->pm_dev);
|
|
/* pm_runtime_put_noidle() will decrease the PM refcount until 0 */
|
|
for (i = 0; i < INA3221_NUM_CHANNELS; i++)
|
|
pm_runtime_put_noidle(ina->pm_dev);
|
|
mutex_destroy(&ina->lock);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void ina3221_remove(struct i2c_client *client)
|
|
{
|
|
struct ina3221_data *ina = dev_get_drvdata(&client->dev);
|
|
int i;
|
|
|
|
debugfs_remove_recursive(ina->debugfs);
|
|
|
|
pm_runtime_disable(ina->pm_dev);
|
|
pm_runtime_set_suspended(ina->pm_dev);
|
|
|
|
/* pm_runtime_put_noidle() will decrease the PM refcount until 0 */
|
|
for (i = 0; i < INA3221_NUM_CHANNELS; i++)
|
|
pm_runtime_put_noidle(ina->pm_dev);
|
|
|
|
mutex_destroy(&ina->lock);
|
|
}
|
|
|
|
static int ina3221_suspend(struct device *dev)
|
|
{
|
|
struct ina3221_data *ina = dev_get_drvdata(dev);
|
|
int ret;
|
|
|
|
/* Save config register value and enable cache-only */
|
|
ret = regmap_read(ina->regmap, INA3221_CONFIG, &ina->reg_config);
|
|
if (ret)
|
|
return ret;
|
|
|
|
/* Set to power-down mode for power saving */
|
|
ret = regmap_update_bits(ina->regmap, INA3221_CONFIG,
|
|
INA3221_CONFIG_MODE_MASK,
|
|
INA3221_CONFIG_MODE_POWERDOWN);
|
|
if (ret)
|
|
return ret;
|
|
|
|
regcache_cache_only(ina->regmap, true);
|
|
regcache_mark_dirty(ina->regmap);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ina3221_resume(struct device *dev)
|
|
{
|
|
struct ina3221_data *ina = dev_get_drvdata(dev);
|
|
int ret;
|
|
|
|
regcache_cache_only(ina->regmap, false);
|
|
|
|
/* Software reset the chip */
|
|
ret = regmap_field_write(ina->fields[F_RST], true);
|
|
if (ret) {
|
|
dev_err(dev, "Unable to reset device\n");
|
|
return ret;
|
|
}
|
|
|
|
/* Restore cached register values to hardware */
|
|
ret = regcache_sync(ina->regmap);
|
|
if (ret)
|
|
return ret;
|
|
|
|
/* Restore config register value to hardware */
|
|
ret = regmap_write(ina->regmap, INA3221_CONFIG, ina->reg_config);
|
|
if (ret)
|
|
return ret;
|
|
|
|
/* Initialize summation channel control */
|
|
if (ina->summation_shunt_resistor) {
|
|
/*
|
|
* Sum only channels that are not disabled for summation.
|
|
* Shunt measurements of disconnected channels should
|
|
* be 0, so it does not matter for summation.
|
|
*/
|
|
ret = regmap_update_bits(ina->regmap, INA3221_MASK_ENABLE,
|
|
INA3221_MASK_ENABLE_SCC_MASK,
|
|
ina->summation_channel_control);
|
|
if (ret) {
|
|
dev_err(dev, "Unable to control summation channel\n");
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static DEFINE_RUNTIME_DEV_PM_OPS(ina3221_pm, ina3221_suspend, ina3221_resume,
|
|
NULL);
|
|
|
|
static const struct of_device_id ina3221_of_match_table[] = {
|
|
{ .compatible = "ti,ina3221", },
|
|
{ /* sentinel */ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, ina3221_of_match_table);
|
|
|
|
static const struct i2c_device_id ina3221_ids[] = {
|
|
{ "ina3221" },
|
|
{ /* sentinel */ }
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, ina3221_ids);
|
|
|
|
static struct i2c_driver ina3221_i2c_driver = {
|
|
.probe = ina3221_probe,
|
|
.remove = ina3221_remove,
|
|
.driver = {
|
|
.name = INA3221_DRIVER_NAME,
|
|
.of_match_table = ina3221_of_match_table,
|
|
.pm = pm_ptr(&ina3221_pm),
|
|
},
|
|
.id_table = ina3221_ids,
|
|
};
|
|
module_i2c_driver(ina3221_i2c_driver);
|
|
|
|
MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
|
|
MODULE_DESCRIPTION("Texas Instruments INA3221 HWMon Driver");
|
|
MODULE_LICENSE("GPL v2");
|