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97dcb82de6
The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all
platforms and are same value on most platforms (0 or 16, depends on
CONFIG_I8259). Define them in asm-mips/mach-generic/irq.h and make
them customizable. This will save a few cycle on each CPU interrupt.
A good side effect is removing some dependencies to MALTA in generic
SMTC code.
Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq
mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing
them might cause some header dependency problem and there seems no
good reason to customize it. So currently only VR41XX is using custom
MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259.
Testing this patch on those platforms is greatly appreciated. Thank
you.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
109 lines
2.5 KiB
C
109 lines
2.5 KiB
C
/*
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* Copyright (C) 2003 Ralf Baechle
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* Handler for RM9000 extended interrupts. These are a non-standard
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* feature so we handle them separately from standard interrupts.
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <asm/irq_cpu.h>
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#include <asm/mipsregs.h>
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#include <asm/system.h>
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static inline void unmask_rm9k_irq(unsigned int irq)
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{
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set_c0_intcontrol(0x1000 << (irq - RM9K_CPU_IRQ_BASE));
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}
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static inline void mask_rm9k_irq(unsigned int irq)
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{
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clear_c0_intcontrol(0x1000 << (irq - RM9K_CPU_IRQ_BASE));
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}
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static inline void rm9k_cpu_irq_enable(unsigned int irq)
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{
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unsigned long flags;
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local_irq_save(flags);
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unmask_rm9k_irq(irq);
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local_irq_restore(flags);
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}
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/*
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* Performance counter interrupts are global on all processors.
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*/
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static void local_rm9k_perfcounter_irq_startup(void *args)
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{
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unsigned int irq = (unsigned int) args;
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rm9k_cpu_irq_enable(irq);
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}
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static unsigned int rm9k_perfcounter_irq_startup(unsigned int irq)
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{
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on_each_cpu(local_rm9k_perfcounter_irq_startup, (void *) irq, 0, 1);
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return 0;
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}
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static void local_rm9k_perfcounter_irq_shutdown(void *args)
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{
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unsigned int irq = (unsigned int) args;
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unsigned long flags;
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local_irq_save(flags);
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mask_rm9k_irq(irq);
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local_irq_restore(flags);
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}
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static void rm9k_perfcounter_irq_shutdown(unsigned int irq)
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{
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on_each_cpu(local_rm9k_perfcounter_irq_shutdown, (void *) irq, 0, 1);
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}
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static struct irq_chip rm9k_irq_controller = {
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.typename = "RM9000",
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.ack = mask_rm9k_irq,
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.mask = mask_rm9k_irq,
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.mask_ack = mask_rm9k_irq,
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.unmask = unmask_rm9k_irq,
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};
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static struct irq_chip rm9k_perfcounter_irq = {
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.typename = "RM9000",
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.startup = rm9k_perfcounter_irq_startup,
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.shutdown = rm9k_perfcounter_irq_shutdown,
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.ack = mask_rm9k_irq,
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.mask = mask_rm9k_irq,
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.mask_ack = mask_rm9k_irq,
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.unmask = unmask_rm9k_irq,
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};
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unsigned int rm9000_perfcount_irq;
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EXPORT_SYMBOL(rm9000_perfcount_irq);
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void __init rm9k_cpu_irq_init(void)
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{
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int base = RM9K_CPU_IRQ_BASE;
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int i;
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clear_c0_intcontrol(0x0000f000); /* Mask all */
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for (i = base; i < base + 4; i++)
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set_irq_chip_and_handler(i, &rm9k_irq_controller,
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handle_level_irq);
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rm9000_perfcount_irq = base + 1;
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set_irq_chip_and_handler(rm9000_perfcount_irq, &rm9k_perfcounter_irq,
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handle_level_irq);
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}
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