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Kbuild supports the infrastructure to build host programs, but there was no support to build userspace programs for the target architecture (i.e. the same architecture as the kernel). Sam Ravnborg worked on this in 2014 (https://lkml.org/lkml/2014/7/13/154), but it was not merged. One problem at that time was, there was no good way to know whether $(CC) can link standalone programs. In fact, pre-built kernel.org toolchains [1] are often used for building the kernel, but they do not provide libc. Now, we can handle this cleanly because the compiler capability is evaluated at the Kconfig time. If $(CC) cannot link standalone programs, the relevant options are hidden by 'depends on CC_CAN_LINK'. The implementation just mimics scripts/Makefile.host The userspace programs are compiled with the same flags as the host programs. In addition, it uses -m32 or -m64 if it is found in $(KBUILD_CFLAGS). This new syntax has two usecases. - Sample programs Several userspace programs under samples/ include UAPI headers installed in usr/include. Most of them were previously built for the host architecture just to use the 'hostprogs' syntax. However, 'make headers' always works for the target architecture. This caused the arch mismatch in cross-compiling. To fix this distortion, sample code should be built for the target architecture. - Bpfilter net/bpfilter/Makefile compiles bpfilter_umh as the user mode helper, and embeds it into the kernel. Currently, it overrides HOSTCC with CC to use the 'hostprogs' syntax. This hack should go away. [1]: https://mirrors.edge.kernel.org/pub/tools/crosstool/ Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Acked-by: Sam Ravnborg <sam@ravnborg.org>
69 lines
2.2 KiB
Makefile
69 lines
2.2 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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# ==========================================================================
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# Cleaning up
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# ==========================================================================
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src := $(obj)
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PHONY := __clean
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__clean:
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include scripts/Kbuild.include
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# The filename Kbuild has precedence over Makefile
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kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
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include $(if $(wildcard $(kbuild-dir)/Kbuild), $(kbuild-dir)/Kbuild, $(kbuild-dir)/Makefile)
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# Figure out what we need to build from the various variables
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# ==========================================================================
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subdir-ymn := $(sort $(subdir-y) $(subdir-m) $(subdir-) \
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$(patsubst %/,%, $(filter %/, $(obj-y) $(obj-m) $(obj-))))
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# Add subdir path
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subdir-ymn := $(addprefix $(obj)/,$(subdir-ymn))
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# build a list of files to remove, usually relative to the current
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# directory
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__clean-files := $(extra-y) $(extra-m) $(extra-) \
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$(always) $(always-y) $(always-m) $(always-) $(targets) $(clean-files) \
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$(hostprogs) $(hostprogs-y) $(hostprogs-m) $(hostprogs-) $(userprogs) \
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$(hostcxxlibs-y) $(hostcxxlibs-m)
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__clean-files := $(filter-out $(no-clean-files), $(__clean-files))
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# clean-files is given relative to the current directory, unless it
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# starts with $(objtree)/ (which means "./", so do not add "./" unless
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# you want to delete a file from the toplevel object directory).
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__clean-files := $(wildcard \
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$(addprefix $(obj)/, $(filter-out $(objtree)/%, $(__clean-files))) \
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$(filter $(objtree)/%, $(__clean-files)))
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# ==========================================================================
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quiet_cmd_clean = CLEAN $(obj)
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cmd_clean = rm -rf $(__clean-files)
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__clean: $(subdir-ymn)
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ifneq ($(strip $(__clean-files)),)
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$(call cmd,clean)
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endif
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@:
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# ===========================================================================
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# Generic stuff
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# ===========================================================================
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# Descending
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# ---------------------------------------------------------------------------
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PHONY += $(subdir-ymn)
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$(subdir-ymn):
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$(Q)$(MAKE) $(clean)=$@
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.PHONY: $(PHONY)
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