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1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
148 lines
4.0 KiB
ArmAsm
148 lines
4.0 KiB
ArmAsm
/*
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* Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/*
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* sb1250_handle_int() is the routine that is actually called when an interrupt
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* occurs. It is installed as the exception vector handler in arch_init_irq()
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* in arch/mips/sibyte/sb1250/irq.c
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*
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* In the handle we figure out which interrupts need handling, and use that to
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* call the dispatcher, which will take care of actually calling registered
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* handlers
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*
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* Note that we take care of all raised interrupts in one go at the handler.
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* This is more BSDish than the Indy code, and also, IMHO, more sane.
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*/
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#include <linux/config.h>
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#include <asm/addrspace.h>
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#include <asm/asm.h>
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#include <asm/mipsregs.h>
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#include <asm/regdef.h>
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#include <asm/stackframe.h>
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#include <asm/sibyte/sb1250_defs.h>
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#include <asm/sibyte/sb1250_regs.h>
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#include <asm/sibyte/sb1250_int.h>
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/*
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* What a pain. We have to be really careful saving the upper 32 bits of any
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* register across function calls if we don't want them trashed--since were
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* running in -o32, the calling routing never saves the full 64 bits of a
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* register across a function call. Being the interrupt handler, we're
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* guaranteed that interrupts are disabled during this code so we don't have
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* to worry about random interrupts blasting the high 32 bits.
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*/
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.text
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.set push
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.set noreorder
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.set noat
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.set mips64
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.align 5
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NESTED(sb1250_irq_handler, PT_SIZE, sp)
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SAVE_ALL
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CLI
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#ifdef CONFIG_SIBYTE_SB1250_PROF
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/* Set compare to count to silence count/compare timer interrupts */
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mfc0 t1, CP0_COUNT
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mtc0 t1, CP0_COMPARE /* pause to clear IP[7] bit of cause ? */
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#endif
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/* Read cause */
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mfc0 s0, CP0_CAUSE
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#ifdef CONFIG_SIBYTE_SB1250_PROF
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/* Cpu performance counter interrupt is routed to IP[7] */
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andi t1, s0, CAUSEF_IP7
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beqz t1, 0f
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srl t1, s0, (CAUSEB_BD-2) /* Shift BD bit to bit 2 */
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and t1, t1, 0x4 /* mask to get just BD bit */
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mfc0 a0, CP0_EPC
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jal sbprof_cpu_intr
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addu a0, a0, t1 /* a0 = EPC + (BD ? 4 : 0) */
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j ret_from_irq
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nop
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0:
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#endif
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/* Timer interrupt is routed to IP[4] */
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andi t1, s0, CAUSEF_IP4
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beqz t1, 1f
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nop
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jal sb1250_timer_interrupt
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move a0, sp /* Pass the registers along */
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j ret_from_irq
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nop # delay slot
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1:
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#ifdef CONFIG_SMP
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/* Mailbox interrupt is routed to IP[3] */
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andi t1, s0, CAUSEF_IP3
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beqz t1, 2f
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nop
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jal sb1250_mailbox_interrupt
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move a0, sp
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j ret_from_irq
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nop # delay slot
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2:
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#endif
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#ifdef CONFIG_KGDB
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/* KGDB (uart 1) interrupt is routed to IP[6] */
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andi t1, s0, CAUSEF_IP6
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beqz t1, 1f
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nop # delay slot
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jal sb1250_kgdb_interrupt
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move a0, sp
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j ret_from_irq
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nop # delay slot
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1:
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#endif
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and t1, s0, CAUSEF_IP2
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beqz t1, 4f
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nop
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/*
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* Default...we've hit an IP[2] interrupt, which means we've got to
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* check the 1250 interrupt registers to figure out what to do
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* Need to detect which CPU we're on, now that smp_affinity is supported.
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*/
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PTR_LA v0, CKSEG1 + A_IMR_CPU0_BASE
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#ifdef CONFIG_SMP
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lw t1, TI_CPU($28)
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sll t1, IMR_REGISTER_SPACING_SHIFT
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addu v0, t1
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#endif
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ld s0, R_IMR_INTERRUPT_STATUS_BASE(v0) /* read IP[2] status */
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beqz s0, 4f /* No interrupts. Return */
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move a1, sp
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3: dclz s1, s0 /* Find the next interrupt */
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dsubu a0, zero, s1
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daddiu a0, a0, 63
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jal do_IRQ
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nop
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4: j ret_from_irq
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nop
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.set pop
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END(sb1250_irq_handler)
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