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9352b05b6e
Many V6 and V7 platforms have an L2x0 cache, so make CONFIG_MIGHT_HAVE_CACHE_L2X0 visible for V6 and V7 multi-platform builds. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
12 lines
286 B
Plaintext
12 lines
286 B
Plaintext
config ARCH_ZYNQ
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bool "Xilinx Zynq ARM Cortex A9 Platform" if ARCH_MULTI_V7
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select ARM_AMBA
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select ARM_GIC
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select HAVE_ARM_SCU if SMP
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select HAVE_ARM_TWD if SMP
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select ICST
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select CADENCE_TTC_TIMER
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select ARM_GLOBAL_TIMER
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help
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Support for Xilinx Zynq ARM Cortex A9 Platform
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