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Now that the driver is ready for it, let's bring in the HDMI controllers variants for the BCM2711. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Tested-by: Chanwoo Choi <cw00.choi@samsung.com> Tested-by: Hoegeun Kwon <hoegeun.kwon@samsung.com> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Link: https://patchwork.freedesktop.org/patch/msgid/b540c7a9ebb7ad51da39271a8388b69c7e27e582.1599120059.git-series.maxime@cerno.tech
185 lines
4.5 KiB
C
185 lines
4.5 KiB
C
#ifndef _VC4_HDMI_H_
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#define _VC4_HDMI_H_
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#include <drm/drm_connector.h>
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#include <media/cec.h>
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#include <sound/dmaengine_pcm.h>
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#include <sound/soc.h>
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#include "vc4_drv.h"
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/* VC4 HDMI encoder KMS struct */
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struct vc4_hdmi_encoder {
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struct vc4_encoder base;
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bool hdmi_monitor;
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bool limited_rgb_range;
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};
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static inline struct vc4_hdmi_encoder *
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to_vc4_hdmi_encoder(struct drm_encoder *encoder)
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{
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return container_of(encoder, struct vc4_hdmi_encoder, base.base);
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}
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struct drm_display_mode;
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struct vc4_hdmi;
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struct vc4_hdmi_register;
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enum vc4_hdmi_phy_channel {
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PHY_LANE_0 = 0,
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PHY_LANE_1,
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PHY_LANE_2,
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PHY_LANE_CK,
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};
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struct vc4_hdmi_variant {
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/* Encoder Type for that controller */
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enum vc4_encoder_type encoder_type;
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/* ALSA card name */
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const char *card_name;
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/* Filename to expose the registers in debugfs */
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const char *debugfs_name;
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/* Set to true when the CEC support is available */
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bool cec_available;
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/* Maximum pixel clock supported by the controller (in Hz) */
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unsigned long long max_pixel_clock;
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/* List of the registers available on that variant */
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const struct vc4_hdmi_register *registers;
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/* Number of registers on that variant */
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unsigned int num_registers;
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/* BCM2711 Only.
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* The variants don't map the lane in the same order in the
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* PHY, so this is an array mapping the HDMI channel (index)
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* to the PHY lane (value).
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*/
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enum vc4_hdmi_phy_channel phy_lane_mapping[4];
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/* Callback to get the resources (memory region, interrupts,
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* clocks, etc) for that variant.
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*/
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int (*init_resources)(struct vc4_hdmi *vc4_hdmi);
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/* Callback to reset the HDMI block */
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void (*reset)(struct vc4_hdmi *vc4_hdmi);
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/* Callback to enable / disable the CSC */
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void (*csc_setup)(struct vc4_hdmi *vc4_hdmi, bool enable);
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/* Callback to configure the video timings in the HDMI block */
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void (*set_timings)(struct vc4_hdmi *vc4_hdmi,
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struct drm_display_mode *mode);
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/* Callback to initialize the PHY according to the mode */
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void (*phy_init)(struct vc4_hdmi *vc4_hdmi,
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struct drm_display_mode *mode);
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/* Callback to disable the PHY */
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void (*phy_disable)(struct vc4_hdmi *vc4_hdmi);
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/* Callback to enable the RNG in the PHY */
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void (*phy_rng_enable)(struct vc4_hdmi *vc4_hdmi);
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/* Callback to disable the RNG in the PHY */
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void (*phy_rng_disable)(struct vc4_hdmi *vc4_hdmi);
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/* Callback to get channel map */
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u32 (*channel_map)(struct vc4_hdmi *vc4_hdmi, u32 channel_mask);
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};
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/* HDMI audio information */
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struct vc4_hdmi_audio {
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struct snd_soc_card card;
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struct snd_soc_dai_link link;
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struct snd_soc_dai_link_component cpu;
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struct snd_soc_dai_link_component codec;
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struct snd_soc_dai_link_component platform;
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int samplerate;
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int channels;
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struct snd_dmaengine_dai_dma_data dma_data;
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struct snd_pcm_substream *substream;
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bool streaming;
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};
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/* General HDMI hardware state. */
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struct vc4_hdmi {
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struct vc4_hdmi_audio audio;
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struct platform_device *pdev;
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const struct vc4_hdmi_variant *variant;
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struct vc4_hdmi_encoder encoder;
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struct drm_connector connector;
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struct i2c_adapter *ddc;
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void __iomem *hdmicore_regs;
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void __iomem *hd_regs;
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/* VC5 Only */
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void __iomem *cec_regs;
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/* VC5 Only */
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void __iomem *csc_regs;
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/* VC5 Only */
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void __iomem *dvp_regs;
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/* VC5 Only */
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void __iomem *phy_regs;
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/* VC5 Only */
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void __iomem *ram_regs;
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/* VC5 Only */
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void __iomem *rm_regs;
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int hpd_gpio;
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bool hpd_active_low;
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struct cec_adapter *cec_adap;
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struct cec_msg cec_rx_msg;
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bool cec_tx_ok;
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bool cec_irq_was_rx;
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struct clk *pixel_clock;
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struct clk *hsm_clock;
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struct clk *audio_clock;
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struct clk *pixel_bvb_clock;
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struct reset_control *reset;
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struct debugfs_regset32 hdmi_regset;
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struct debugfs_regset32 hd_regset;
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};
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static inline struct vc4_hdmi *
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connector_to_vc4_hdmi(struct drm_connector *connector)
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{
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return container_of(connector, struct vc4_hdmi, connector);
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}
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static inline struct vc4_hdmi *
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encoder_to_vc4_hdmi(struct drm_encoder *encoder)
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{
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struct vc4_hdmi_encoder *_encoder = to_vc4_hdmi_encoder(encoder);
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return container_of(_encoder, struct vc4_hdmi, encoder);
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}
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void vc4_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi,
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struct drm_display_mode *mode);
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void vc4_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi);
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void vc4_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi);
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void vc4_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi);
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void vc5_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi,
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struct drm_display_mode *mode);
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void vc5_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi);
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void vc5_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi);
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void vc5_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi);
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#endif /* _VC4_HDMI_H_ */
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