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36e2d7cfdc
A hardware limitation exists for CAAM until Era 9 which restricts
the accelerator to IVs with only 8 bytes. When CAAM has a lower era
a fallback is necessary to process 16 bytes IV.
Fixes: 226853ac3e
("crypto: caam/qi2 - add skcipher algorithms")
Cc: <stable@vger.kernel.org> # v4.20+
Signed-off-by: Andrei Botila <andrei.botila@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
178 lines
5.1 KiB
Plaintext
178 lines
5.1 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
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config CRYPTO_DEV_FSL_CAAM_COMMON
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tristate
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config CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC
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tristate
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config CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC
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tristate
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config CRYPTO_DEV_FSL_CAAM
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tristate "Freescale CAAM-Multicore platform driver backend"
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depends on FSL_SOC || ARCH_MXC || ARCH_LAYERSCAPE
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select SOC_BUS
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select CRYPTO_DEV_FSL_CAAM_COMMON
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imply FSL_MC_BUS
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help
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Enables the driver module for Freescale's Cryptographic Accelerator
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and Assurance Module (CAAM), also known as the SEC version 4 (SEC4).
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This module creates job ring devices, and configures h/w
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to operate as a DPAA component automatically, depending
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on h/w feature availability.
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To compile this driver as a module, choose M here: the module
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will be called caam.
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if CRYPTO_DEV_FSL_CAAM
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config CRYPTO_DEV_FSL_CAAM_DEBUG
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bool "Enable debug output in CAAM driver"
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help
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Selecting this will enable printing of various debug
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information in the CAAM driver.
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menuconfig CRYPTO_DEV_FSL_CAAM_JR
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tristate "Freescale CAAM Job Ring driver backend"
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select CRYPTO_ENGINE
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default y
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help
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Enables the driver module for Job Rings which are part of
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Freescale's Cryptographic Accelerator
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and Assurance Module (CAAM). This module adds a job ring operation
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interface.
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To compile this driver as a module, choose M here: the module
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will be called caam_jr.
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if CRYPTO_DEV_FSL_CAAM_JR
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config CRYPTO_DEV_FSL_CAAM_RINGSIZE
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int "Job Ring size"
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range 2 9
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default "9"
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help
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Select size of Job Rings as a power of 2, within the
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range 2-9 (ring size 4-512).
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Examples:
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2 => 4
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3 => 8
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4 => 16
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5 => 32
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6 => 64
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7 => 128
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8 => 256
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9 => 512
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config CRYPTO_DEV_FSL_CAAM_INTC
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bool "Job Ring interrupt coalescing"
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help
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Enable the Job Ring's interrupt coalescing feature.
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Note: the driver already provides adequate
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interrupt coalescing in software.
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config CRYPTO_DEV_FSL_CAAM_INTC_COUNT_THLD
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int "Job Ring interrupt coalescing count threshold"
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depends on CRYPTO_DEV_FSL_CAAM_INTC
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range 1 255
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default 255
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help
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Select number of descriptor completions to queue before
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raising an interrupt, in the range 1-255. Note that a selection
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of 1 functionally defeats the coalescing feature, and a selection
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equal or greater than the job ring size will force timeouts.
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config CRYPTO_DEV_FSL_CAAM_INTC_TIME_THLD
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int "Job Ring interrupt coalescing timer threshold"
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depends on CRYPTO_DEV_FSL_CAAM_INTC
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range 1 65535
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default 2048
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help
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Select number of bus clocks/64 to timeout in the case that one or
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more descriptor completions are queued without reaching the count
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threshold. Range is 1-65535.
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config CRYPTO_DEV_FSL_CAAM_CRYPTO_API
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bool "Register algorithm implementations with the Crypto API"
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default y
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select CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC
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select CRYPTO_AEAD
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select CRYPTO_AUTHENC
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select CRYPTO_SKCIPHER
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select CRYPTO_LIB_DES
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select CRYPTO_XTS
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help
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Selecting this will offload crypto for users of the
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scatterlist crypto API (such as the linux native IPSec
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stack) to the SEC4 via job ring.
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config CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI
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bool "Queue Interface as Crypto API backend"
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depends on FSL_DPAA && NET
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default y
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select CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC
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select CRYPTO_AUTHENC
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select CRYPTO_SKCIPHER
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select CRYPTO_DES
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select CRYPTO_XTS
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help
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Selecting this will use CAAM Queue Interface (QI) for sending
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& receiving crypto jobs to/from CAAM. This gives better performance
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than job ring interface when the number of cores are more than the
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number of job rings assigned to the kernel. The number of portals
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assigned to the kernel should also be more than the number of
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job rings.
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config CRYPTO_DEV_FSL_CAAM_AHASH_API
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bool "Register hash algorithm implementations with Crypto API"
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default y
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select CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC
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select CRYPTO_HASH
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help
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Selecting this will offload ahash for users of the
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scatterlist crypto API to the SEC4 via job ring.
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config CRYPTO_DEV_FSL_CAAM_PKC_API
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bool "Register public key cryptography implementations with Crypto API"
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default y
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select CRYPTO_RSA
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help
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Selecting this will allow SEC Public key support for RSA.
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Supported cryptographic primitives: encryption, decryption,
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signature and verification.
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config CRYPTO_DEV_FSL_CAAM_RNG_API
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bool "Register caam device for hwrng API"
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default y
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select CRYPTO_RNG
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select HW_RANDOM
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help
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Selecting this will register the SEC4 hardware rng to
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the hw_random API for supplying the kernel entropy pool.
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endif # CRYPTO_DEV_FSL_CAAM_JR
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endif # CRYPTO_DEV_FSL_CAAM
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config CRYPTO_DEV_FSL_DPAA2_CAAM
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tristate "QorIQ DPAA2 CAAM (DPSECI) driver"
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depends on FSL_MC_DPIO
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depends on NETDEVICES
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select CRYPTO_DEV_FSL_CAAM_COMMON
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select CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC
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select CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC
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select CRYPTO_SKCIPHER
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select CRYPTO_AUTHENC
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select CRYPTO_AEAD
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select CRYPTO_HASH
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select CRYPTO_DES
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select CRYPTO_XTS
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help
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CAAM driver for QorIQ Data Path Acceleration Architecture 2.
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It handles DPSECI DPAA2 objects that sit on the Management Complex
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(MC) fsl-mc bus.
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To compile this as a module, choose M here: the module
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will be called dpaa2_caam.
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