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2b5a0e425e
Idle code is very like entry code in that RCU isn't available. As such, add a little validation. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Tested-by: Tony Lindgren <tony@atomide.com> Tested-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: Frederic Weisbecker <frederic@kernel.org> Link: https://lore.kernel.org/r/20230112195540.373461409@infradead.org
94 lines
1.5 KiB
Plaintext
94 lines
1.5 KiB
Plaintext
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* vmlinux.lds.S -- master linker script for m68knommu arch
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*
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* (C) Copyright 2002-2012, Greg Ungerer <gerg@snapgear.com>
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*
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* This linker script is equipped to build either ROM loaded or RAM
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* run kernels.
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*/
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#if defined(CONFIG_RAMKERNEL)
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#define KTEXT_ADDR CONFIG_KERNELBASE
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#endif
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#if defined(CONFIG_ROMKERNEL)
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#define KTEXT_ADDR CONFIG_ROMSTART
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#define KDATA_ADDR CONFIG_KERNELBASE
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#define LOAD_OFFSET KDATA_ADDR + (ADDR(.text) + SIZEOF(.text))
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#endif
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#include <asm/page.h>
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#include <asm/thread_info.h>
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#include <asm-generic/vmlinux.lds.h>
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OUTPUT_ARCH(m68k)
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ENTRY(_start)
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jiffies = jiffies_64 + 4;
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SECTIONS {
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#ifdef CONFIG_ROMVEC
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. = CONFIG_ROMVEC;
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.romvec : {
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__rom_start = .;
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_romvec = .;
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*(.romvec)
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*(.data..initvect)
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}
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#endif
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. = KTEXT_ADDR;
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_text = .;
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_stext = .;
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.text : {
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HEAD_TEXT
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TEXT_TEXT
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IRQENTRY_TEXT
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SOFTIRQENTRY_TEXT
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SCHED_TEXT
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LOCK_TEXT
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*(.fixup)
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. = ALIGN(16);
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}
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_etext = .;
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#ifdef KDATA_ADDR
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. = KDATA_ADDR;
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#endif
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_sdata = .;
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RO_DATA(PAGE_SIZE)
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RW_DATA(16, PAGE_SIZE, THREAD_SIZE)
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_edata = .;
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EXCEPTION_TABLE(16)
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. = ALIGN(PAGE_SIZE);
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__init_begin = .;
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INIT_TEXT_SECTION(PAGE_SIZE)
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INIT_DATA_SECTION(16)
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PERCPU_SECTION(16)
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.m68k_fixup : {
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__start_fixup = .;
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*(.m68k_fixup)
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__stop_fixup = .;
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}
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.init.data : {
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. = ALIGN(PAGE_SIZE);
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__init_end = .;
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}
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BSS_SECTION(4, 0, 4)
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_end = .;
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STABS_DEBUG
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ELF_DETAILS
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/* Sections to be discarded */
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DISCARDS
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}
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